MCM6709R

1

MOTOROLA FAST SRAM

64K x 4 Bit Static RAM

The MCM6709R is a 262,144 bit static random access memory organized as

65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS

technology. Static design eliminates the need for external clocks or timing

strobes.

Output enable (G) is a special control feature that provides increased system

flexibility and eliminates bus contention problems.

The MCM6709R meets JEDEC standards and is available in a revolutionary

pinout 300 mil, 28 lead plastic surface–mount SOJ package.

• Single 5 V ± 10% Power Supply

• Fully Static — No Clock or Timing Strobes Necessary

• All Inputs and Outputs are TTL Compatible

• Center Power and I/O Pins for Reduced Noise

• Three State Outputs

• Fast Access Times: MCM6709R–6 = 6 ns

MCM6709R–7 = 7 ns

MCM6709R–8 = 8 ns

BLOCK DIAGRAM

G

INPUT

DATA

CONTROL

MEMORY MATRIX

512 ROWS x 128 x 4

COLUMNS

COLUMN I/O

COLUMN DECODER

DQ0

DQ3

E

W

ROW

DECODER

••

•

••

•

••

•

••

•

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

Order this document

by MCM6709R/D

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

PIN ASSIGNMENT

MCM6709R

A0 – A15

Address Inputs

. . . . . . . . . . . .

W

Write Enable

. . . . . . . . . . . . . . . . . . . .

G

Output Enable

. . . . . . . . . . . . . . . . . . .

E

Chip Enable

. . . . . . . . . . . . . . . . . . . . . .

DQ0 – DQ3

Data Input/Output

. . . . . . . .

VCC

+ 5 V Power Supply

. . . . . . . . . . . .

VSS

Ground

. . . . . . . . . . . . . . . . . . . . . . .

NC

No Connection

. . . . . . . . . . . . . . . . .

PIN NAMES

J PACKAGE

300 MIL SOJ

CASE 810B–03

5

4

3

2

1

10

9

8

7

6

11

12

13

14

20

21

22

23

24

25

26

19

27

28

18

17

16

15

VCC

A3

A2

A1

A0

A4

VSS

E

A7

A6

A5

DQ0

DQ1

W

G

A12

A13

A14

A15

A8

A9

A10

NC

DQ2

VSS

DQ3

A11

VCC

All power supply and ground pins must

be connected for proper operation of the

device.

REV 1

5/95