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3

HMC829LP6GE

v01.0911

FRACTIONAL-N PLL WITH INTEGRATED VCO

45 - 1050, 1400 - 2100, 2800 - 4200 MHz

Parameter

condition

Min.

typ.

Max.

Units

REF Input Characteristics

Max ref input Frequency

350

Mhz

ref input voltage

ac coupled

[2]

1

2

3.3

vp-p

ref input capacitance

5

pF

14-Bit r-divider range

1

16,383

Pd Frequency Fractional Mode B

[4]

dc

100

Mhz

Pd Frequency Fractional Mode a (and register

6 [17:16] = 11)

dc

80

Mhz

Pd Frequency integer Mode

dc

125

Mhz

Charge Pump

output current

0.02

2.54

ma

charge Pump gain step size

20

µa

Pd/charge Pump ssB Phase noise

50 Mhz ref, input referred

1 khz

-143

dBc/hz

10 khz

add 1 dB for Fractional

-150

dBc/hz

100 khz

add 3 dB for Fractional

-153

dBc/hz

Logic Inputs

vsw

40

50

60

% dvdd

Logic Outputs

voh output high voltage

dvdd

v

voL output Low voltage

0

v

output impedance

100

200

Ω

Maximum Load current

1.5

ma

Power Supply Voltages

3.3 v supplies

avdd, vcchF, vccPs,

vccPd, rvdd,dvdd

3.0

3.3

3.5

v

5 v supplies

vPPcP, vddLs, vcc1, vcc2

4.8

5

5.2

v

Power Supply Currents

+5v analog charge Pump

vPPcP, vddLs

8

ma

+5v vco core and vco Buffer

fo/1 Mode vcc2

105

ma

fo/n Mode vcc2

80

ma

+5v vco divider and rF/PLL Buffer

single-ended output Mode

fo/1 Mode vcc1

25

ma

differential output Mode

fo/1 Mode vcc1

40

ma

single-ended output Mode

fo/n Mode vcc1

80

100

ma

differential output Mode

fo/n Mode vcc1

95

115

ma

[3] slew rate of greater or equal to 0.5 ns/v is recommended, see PLL with integrated rF vcos operating guide for more details. Frequency is

guaranteed across process voltage and temperature from -40 °c to 85 °c.

[4] this maximum phase detector frequency can only be achieved if the minimum n value is respected. eg. in the case of fractional feedback

mode, the maximum PFd rate = fvco/20 or 100 Mhz, whichever is less.