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MCM6729CWJ7 Datasheet(PDF) 5 Page - Motorola, Inc

Part # MCM6729CWJ7
Description  256K x 4 Bit Fast Static Random Access Memory
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MCM6729CWJ7 Datasheet(HTML) 5 Page - Motorola, Inc

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MCM6729C
5
MOTOROLA FAST SRAM
WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
MCM6729C–6
MCM6729C–7
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
6
7
ns
3
Address Setup Time
tAVWL
0
0
ns
Address Valid to End of Write
tAVWH
6
7
ns
Address Valid to End of Write,
G High
tAVWH
6
7
ns
Write Pulse Width
tWLWH
tWLEH
6
7
ns
Write Pulse Width, G High
tWLWH
tWLEH
6
7
ns
Data Valid to End of Write
tDVWH
3
3.5
ns
Data Hold Time
tWHDX
0
0
ns
Write Low to Data High–Z
tWLQZ
3.5
3.5
ns
4,5,6
Write High to Output Active
tWHQX
3
3
ns
4,5,6
Write Recovery Time
tWHAX
1
1
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycles.
3. All write cycle timings are referenced from the last valid address to the first transitioning address.
4. Transition is measured 200 mV from steady–state voltage with load of Figure 1b.
5. This parameter is sampled and not 100% tested.
6. At any given voltage and temperature, tWLQZ max < tWHQX min both for a given device and from device to device.
WRITE CYCLE 1
DATA VALID
tDVWH
tAVWL
tAVWH
tAVAV
tWHAX
tWLWH
tWHDX
tWLQZ
tWHQX
HIGH–Z
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
tWLEH


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