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4PT08G-05 Datasheet(PDF) 4 Page - Nell Semiconductor Co., Ltd

Part # 4PT08G-05
Description  Sensitive gate SCRs, 4A
Download  6 Pages
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Manufacturer  NELLSEMI [Nell Semiconductor Co., Ltd]
Direct Link  http://www.nellsemi.com
Logo NELLSEMI - Nell Semiconductor Co., Ltd

4PT08G-05 Datasheet(HTML) 4 Page - Nell Semiconductor Co., Ltd

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SEMICONDUCTOR
RoHS
RoHS
Page4of6
I
,I ,I [Tj]/I
,I ,I [Tj=25 C]
GT H L
GT H L
0
1
2
3
4
5
0.01
0.10
10.00
2
6
8
200
600
1000
0
400
800
0
0
4
2
4
6
1400
1800
1200
1600
4PTSeries
-40
-20
0
20
40
60
80
100
120
140
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Fig.5 Relative variation of gate trigger current
andholdingcurrentversusjunction
temperature
Fig.6 Relative variation of holding current
versusgate-cathoderesistance
(typicalvalues)
1
E-2
1
E-1
1
E+0
1
E+1
Tj=125 C
V =0.67XV
D
DRM
R
(KΩ)
GK
2000
1.00
dV/dt[R
]/dV/dt[R
=220Ω]
GK
GK
C
(nF)
GK
V =0.67XV
D
DRM
T =125 C
j
°
RGK=220
22
8
10
12
14
16
18
20
10
Fig.7 Relative variation of dV/dt immunity
versusgate-cathoderesistance
(typicalvalues)
Fig.8 Relative variation of dV/dt immunity
versusgate-cathodecapacitance
(typicalvalues)
dV/dt[C
]/dV/dt[R
=220Ω]
GK
GK
I [R
]/I [R
=1KΩ
H
GK
H
GK
Tj=25 C
°
R
(K )
GK
Tj(°C)
l
IL
hand
R
=1K
GK
IGT
www.nellsemi.com
Fig.3 Average and DC on-state current versus
(
ambient temperature DPAK)
Fig.
Relative variation of thermal impedance
4
junction to ambient versus pulse duration
(DPAK)
DevicemountedonFR4with
recommendedpadlayout
DPAK(S=0.5
²)
cm
DC
α
=180°
IPAK
DC
α
=180°
Tamb(°C)
Zth(j-c)
Zth(j-a)
tp(s)
DevicemountedonFR4with
recommendedpadlayout
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
1
E-3
1
E-2
1
E-1
1
E+0
1
E+1
1
E+2
5E+2
1
E-3
1
E-2
1
E-1
1
E+0
I (AV)(A)
T
K=[Zth(j-c)/Rth(j-c)]


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