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16T06H-BW Datasheet(PDF) 6 Page - Nell Semiconductor Co., Ltd |
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16T06H-BW Datasheet(HTML) 6 Page - Nell Semiconductor Co., Ltd |
6 / 7 page 3000 100 1000 0.0 0.01 0.10 1.00 10.00 0.5 1.0 1.5 2.0 2.5 IH&IL Tj( °C) IGT 1.0 0.1 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 (dV/dt)c (V/µs) (dI/dt)c [(dV/dt)c] / Specified (dI/dt)c C B 0 1 2 3 4 5 6 (dI/dt)c [T ] / pecified] j (dI/dt)c [T s j T (°C) j SEMICONDUCTOR 16T Series RoHS RoHS dl/dt limitation: 50A/µs lTSM l²t Tj initial=25 °C I (A), I²t(A²S) TSM holding current and latching current versus junction temperature (typical values) -40 -20 0 20 40 60 80 100 120 140 SW CW/BW snubberless and Logic level types standard types 10.0 100.0 0 25 50 75 100 125 D²PAK S(cm²) 0 4 8 12 16 20 24 28 32 36 40 0 10 20 30 40 50 60 70 80 Page 6 of 7 IGT,IH,IL[Tj] / IGT,IH,IL[Tj = 25°C] Rth(j-a)(°C/W) Fig7. Non-repetitive surge peak on-state current for a sinusoidal Fig.8 Relative variation of gate trigger current Fig.9 Relative variation of critical rate of decrease of main current versus (dV/dt)c (typical values) Fig.10 Relative variation of critical rate of decrease of main current versus (dV/dt)c (typical values) Fig.11 D²PAK thermal resistance junction to ambient versus copper surface under tab (printed circuit FR4, copper thickness: 35µm www.nellsemi.com tp(ms) pulse with width tp<10ms and corresponding value of l²t |
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