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INA282AQDRQ1 Datasheet(PDF) 2 Page - Texas Instruments |
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INA282AQDRQ1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 30 page INA282-Q1 SBOS554 – MARCH 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PACKAGE PACKAGE PRODUCT GAIN PACKAGE DESIGNATOR MARKING INA282AQDRQ1 282Q1 50V/V SOIC-8 D INA282AQDRDN 282DN (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or see the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range, unless otherwise noted. VALUE UNIT MIN MAX Supply voltage 18 V Differential (V+IN) – (V–IN) (3) –5 5 V Analog inputs, V+IN, V–IN (2) Common-Mode –14 80 V Ref1, Ref2, Out GND–0.3 (V+) + 0.3 V Input current into any pin 5 mA Storage temperature –65 150 °C Junction temperature 150 °C Human Body Model (HBM) AEC-Q100 Classification Level H2 2 kV ESD ratings Charged-Device Model (CDM) AEC-Q100 Classification Level C3B 750 V (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) V+IN and V–IN are the voltages at the +IN and –IN pins, respectively. (3) Input voltages must not exceed common-mode rating. THERMAL INFORMATION INA282-Q1 THERMAL METRIC(1) UNITS D (8-PINS) θJA Junction-to-ambient thermal resistance 134.9 θJCtop Junction-to-case (top) thermal resistance 72.9 θJB Junction-to-board thermal resistance 61.3 °C/W ψJT Junction-to-top characterization parameter 18.9 ψJB Junction-to-board characterization parameter 54.3 θJCbot Junction-to-case (bottom) thermal resistance n/a (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Link(s): INA282-Q1 |
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