TLV320DAC3202

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SLAS726B – SEPTEMBER 2010 – REVISED MARCH 2012

Table 7. Detailed Configuration of Interface Including PLL Setup Registers (continued)

BCLK/WCLK

DATA SIZE

BCLK/PLL INPUT

32

16

44.100

1411.2

1411.2

40

20

44.100

1764

1764

48

24

44.100

2116.8

2116.8

64

32

44.100

2822.4

2822.4

64

16

8.000

256

512

64

16

11.025

352.8

705.6

64

16

12.000

384

768

64

16

16.000

512

1024

64

16

22.050

705.6

1411.2

64

16

24.000

768

1536

64

16

32.000

1024

2048

64

16

44.100

1411.2

2822.4

64

16

48.000

1536

3072

80

20

8.000

320

640

80

20

11.025

441

882

80

20

12.000

480

960

80

20

16.000

640

1280

80

20

22.050

882

1764

80

20

24.000

960

1920

80

20

32.000

1280

2560

80

20

44.100

1764

3528

80

20

48.000

1920

3840

96

24

8.000

384

768

96

24

11.025

529.2

1058.4

96

24

12.000

576

1152

96

24

16.000

768

1536

96

24

22.050

1058.4

2116.8

96

24

24.000

1152

2304

96

24

32.000

1536

3072

96

24

44.100

2116.8

4233.6

96

24

48.000

2304

4608

128

32

8.000

512

1024

128

32

11.025

705.6

1411.2

128

32

12.000

768

1536

128

32

16.000

1024

2048

128

32

22.050

1411.2

2822.4

128

32

24.000

1536

3072

128

32

32.000

2048

4096

128

32

44.100

2822.4

5644.8

128

32

48.000

3072

6144

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