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TLV70012DCKT Datasheet(PDF) 11 Page - Texas Instruments |
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TLV70012DCKT Datasheet(HTML) 11 Page - Texas Instruments |
11 / 34 page P =(V V ) I - ´ D IN OUT OUT TLV700xx www.ti.com SLVSA00C – SEPTEMBER 2009 – REVISED JULY 2011 Dropout Voltage For good reliability, thermal protection should trigger at least +35 °C above the maximum expected ambient The TLV700xx uses a PMOS pass transistor to condition of the particular application. This achieve low dropout. When (VIN – VOUT) is less than configuration produces a worst-case junction the dropout voltage (VDO), the PMOS pass device is temperature of +125 °C at the highest expected in the linear region of operation and the ambient temperature and worst-case load. input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO scales approximately with output The internal protection circuitry of the TLV700xx has current because the PMOS device behaves as a been designed to protect against overload conditions. resistor in dropout. It was not intended to replace proper heatsinking. Continuously running the TLV700xx into thermal As with any linear regulator, PSRR and transient shutdown degrades device reliability. response are degraded as (VIN – VOUT) approaches dropout. This effect is shown in Figure 13 in the Power Dissipation Typical Characteristics section. The ability to remove heat from the die is different for Transient Response each package type, presenting different considerations in the printed circuit board (PCB) As with any regulator, increasing the size of the layout. The PCB area around the device that is free output capacitor reduces over-/undershoot magnitude of other components moves the heat from the device but increases the duration of the transient response. to the ambient air. Performance data for JEDEC low and high-K boards are given in the Dissipation Undervoltage Lockout (UVLO) Ratings table. Using heavier copper increases the effectiveness in removing heat from the device. The The TLV700xx uses an undervoltage lockout circuit to addition of plated through-holes to heat-dissipating keep the output shut off until internal circuitry is layers also improves heatsink effectiveness. operating properly. Power dissipation depends on input voltage and load Thermal Information conditions. Power dissipation (PD) is equal to the product of the output current and the voltage drop Thermal protection disables the output when the across the output pass element, as shown in junction temperature rises to approximately +160 °C, Equation 1. allowing the device to cool. When the junction temperature cools to approximately +140 °C, the (1) output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient Package Mounting temperature, the thermal protection circuit may cycle Solder pad footprint recommendations for the on and off. This cycling limits the dissipation of the TLV700xx are available from the Texas Instruments regulator, protecting it from damage as a result of web site at www.ti.com. The recommended land overheating. patterns for the DSE, DDC, and DCK packages are Any tendency to activate the thermal protection circuit shown in Figure 22, Figure 23, and Figure 24, indicates excessive power dissipation or an respectively. Figure 25, Figure 26, and Figure 27 inadequate heatsink. For reliable operation, junction show the mechanical package dimensions for the temperature should be limited to +125 °C maximum. DSE, DDC, and DCK packages, respectively. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. Copyright © 2009–2011, Texas Instruments Incorporated 11 |
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