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TMS320F280230PTT Datasheet(PDF) 6 Page - Texas Instruments |
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TMS320F280230PTT Datasheet(HTML) 6 Page - Texas Instruments |
6 / 119 page TMS320F280270, TMS320F280260 TMS320F280230, TMS320F280220 SPRS810 – APRIL 2012 www.ti.com 2.2 Memory Maps In Figure 2-1 and Figure 2-2, the following apply: • Memory blocks are not to scale. • Peripheral Frame 0, Peripheral Frame 1 and Peripheral Frame 2 memory maps are restricted to data memory only. A user program cannot access these memory maps in program space. • Protected means the order of Write-followed-by-Read operations is preserved rather than the pipeline order. • Certain memory ranges are EALLOW protected against spurious writes after configuration. • Locations 0x3D7C80 – 0x3D7CC0 contain the internal oscillator and ADC calibration routines. These locations are not programmable by the user. 6 Device Overview Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320F280270 TMS320F280260 TMS320F280230 TMS320F280220 |
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