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TPS7A7001DDAR Datasheet(PDF) 5 Page - Texas Instruments |
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TPS7A7001DDAR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 17 page GND FB OUT NC NC EN IN NC 1 2 3 4 8 7 6 5 PowerPAD V = 0.5 x ( ) OUT 1 + R 1 R 2 Thermal Protection OUT V OUT IN EN Hysteresis Current Limit UVLO GND Charge Pump 0.5V Reference R 1 R 2 FB TPS7A7001 www.ti.com SBVS134A – JANUARY 2012 – REVISED JUNE 2012 FUNCTIONAL BLOCK DIAGRAM Figure 1. Adjustable Output Voltage Version PIN CONFIGURATIONS DDA PACKAGE SOIC-8 (TOP VIEW) Pin Descriptions NAME PIN # DESCRIPTION EN 2 Enable input. Pulling this pin below 0.5 V turns the regulator off. Connect to VIN if not being used. This pin is the output voltage feedback input through voltage dividers. See the recommended feedback FB 7 resistor table for more details. GND 8 Ground pin IN 3 Unregulated supply voltage pin. It is recommended to connect an input capacitor to this pin. Not internally connected. The NC pins are not connected to any electrical node. It is recommended to NC 1, 4, 5 connect the NC pins to large-area planes. OUT 6 Regulated output pin. A 4.7- μF or larger capacitor of any type is required for stability. It is strongly recommended to connect the thermal pad to a large-area ground plane. If an electrically PowerPAD floating, dedicated thermal plane is available, the thermal pad can also be connected to it. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 5 |
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