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TPS799L57YZYT Datasheet(PDF) 2 Page - Texas Instruments |
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TPS799L57YZYT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 14 page TPS799L SBVS191 – APRIL 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT VOUT TPS799Lxx yyy z XX is nominal output voltage (for example, 57 = 5.7V). YYY is package designator. Z is package quantity. (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE MIN MAX UNIT IN –0.3 +7.0 V Voltage(2) EN –0.3 VIN + 0.3 V OUT –0.3 VIN + 0.3 V Current OUT Internally limited mA Operating virtual junction, TJ –55 +150 °C Temperature Storage, Tstg –55 +150 °C Human body model (HBM) QSS 009-105 (JESD22-A114A) 2 kV Electrostatic discharge ratings(3) Charge device model (CDM) QSS 009-147 (JESD22-C101B.01) 500 V (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute- maximum-rated conditions for extended periods my affect device reliability. (2) All voltages are with respect to network ground terminal. (3) ESD testing is performed according to the respective JESD22 JEDEC standard. THERMAL INFORMATION TPS799L THERMAL METRIC(1)(2) YZY (WCSP) UNITS 5 PINS θJA Junction-to-ambient thermal resistance 143.3 θJCtop Junction-to-case (top) thermal resistance 1.1 θJB Junction-to-board thermal resistance 84.7 °C/W ψJT Junction-to-top characterization parameter 3.8 ψJB Junction-to-board characterization parameter 84.4 θJCbot Junction-to-case (bottom) thermal resistance N/A (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator. 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated |
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