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AS1160 Datasheet(PDF) 6 Page - ams AG |
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AS1160 Datasheet(HTML) 6 Page - ams AG |
6 / 29 page www.austriamicrosystems.com/Interfaces-LVDS/AS1160_61 Revision 1.01 6 - 29 AS1160/AS1161 Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics AVDD = DVDD = 3V to 3.6V, TAMB = -40°C to +85°C, RLOAD=28 Ω, CLOAD = 10pF, typical values @ TAMB = +25°C and VDD = 3.3V (unless otherwise specified). Serializer Electrical Characteristics Serializer Timing Requirements for TCLK Serializer Switching Characteristics Table 4. Electrical Characteristics Symbol Parameter Conditions Min Typ Max Unit Serializer LVCMOS/LVTTL DC Specifications (pins DINx, TCLK, PWDNN, TCKR/FN, SYNC1, SYNC2, DEN) VIH High Level Input Voltage 2.0 VDD V VIL Low Level Input Voltage GND 0.8 V IIN Input Current VIN = 0V or 3.6V -1 +1 µA Serializer Bus LVDS DC Specifications (pins DO+ and DO-) VOD Output Differential Voltage (DO+ to DO-) Figure 34 on page 18 200 360 mV ΔVOD Output Differential Voltage Unbalance 1 35 mV VOS Offset Voltage 1.1 1.2 1.3 V ΔVOS Offset Voltage Unbalance 2 35 mV IOS Output Short-Circuit Current DO = 0V, DIN = High, PWDNN and DEN = VDD -13 -20 mA IOZ Tri-State Output Current PWDNN or DEN = GND, DO = 0V or VDD -1 +1 µA IOX Power-Off Output Current PWDNN = DEN = VDD = 0V, DO = 0V or 3.6V -1 +1 µA Serializer Supply Current (pins DVDD and AVDD) ICCD Serializer Supply Current (Worst Case) ICC-Pattern Figure 16 on page 12 f = 20MHz 35 50 mA f = 66MHz 70 90 ICCXD Serializer Supply Current (Powerdown) PWDNN = GND, fCLK = DC (off) 400 700 µA Table 5. Serializer Timing Requirements for TCLK Symbol Parameter Conditions Min Typ Max Unit fCLK Transmit Clock Freq. Figure 20 on page 13 20 66 MHz tTCP Transmit Clock Period 15.15 50 ns tTCDC Transmit Clock Duty Cycle 40 60 % tCLKT TCLK Input Transition Time 3 6 ns tJIT TCLK Input Jitter 150 ps (RMS) Table 6. Serializer Switching Characteristics 1 Symbol Parameter Conditions Min Typ Max Unit tLLHT Bus LVDS Low-to-High Transition Time Figure 18 on page 13 0.25 0.4 ns tLHLT Bus LVDS High-to-Low Transition Time 0.25 0.4 ns |
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