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EBJ41UF8BCS0-GN-F Datasheet(PDF) 5 Page - Elpida Memory |
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EBJ41UF8BCS0-GN-F Datasheet(HTML) 5 Page - Elpida Memory |
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5 / 16 page  EBJ41UF8BCS0 Data Sheet E1670E30 (Ver. 3.0) 5 Serial PD Matrix -DJ -GN Byte No. Function described Hex Comments Hex Comments 0 Number of serial PD bytes written/ SPD device size/CRC coverage 92h 176/256/0-116 92h 176/256/0-116 1 SPD revision 10h Rev.1.0 10h Rev.1.0 2 Key byte/DRAM device type 0Bh DDR3 SDRAM 0Bh DDR3 SDRAM 3 Key byte/module type 03h SO-DIMM 03h SO-DIMM 4 SDRAM density and banks 03h 2G bits, 8 banks 03h 2G bits, 8 banks 5 SDRAM addressing 19h 15 rows, 10 columns 19h 15 rows, 10 columns 6 Module nominal voltage, VDD 00h 1.5V 00h 1.5V 7 Module organization 09h 2 ranks/ ×8 bits 09h 2 ranks/ ×8 bits 8 Module memory bus width 03h 64 bits/non-ECC 03h 64 bits/non-ECC 9 Fine timebase (FTB) dividend/divisor 52h 5/2 52h 5/2 10 Medium timebase (MTB) dividend 01h 1 01h 1 11 Medium timebase (MTB) divisor 08h 8 08h 8 12 SDRAM minimum cycle time (tCK (min.)) 0Ch 1.5ns 0Ah 1.25ns 13 Reserved 00h — 00h — 14 SDRAM CAS latencies supported, LSB 7Eh 5, 6, 7, 8, 9, 10 FEh 5, 6, 7, 8, 9, 10, 11 15 SDRAM CAS latencies supported, MSB 00h — 00h — 16 SDRAM minimum CAS latencies time (tAA (min.)) 69h 13.125ns 69h 13.125ns 17 SDRAM minimum write recovery time (tWR (min.)) 78h 15ns 78h 15ns 18 SDRAM minimum /RAS to /CAS delay (tRCD (min.)) 69h 13.125ns 69h 13.125ns 19 SDRAM minimum row active to row active delay (tRRD (min.)) 30h 6ns 30h 6ns 20 SDRAM minimum row precharge time (tRP (min.)) 69h 13.125ns 69h 13.125ns 21 SDRAM upper nibbles for tRAS and tRC 11h — 11h — 22 SDRAM minimum active to precharge time (tRAS (min.)), LSB 20h 36ns 18h 35ns 23 SDRAM minimum active to active /auto-refresh time (tRC (min.)), LSB 89h 49.125ns 81h 48.125ns 24 SDRAM minimum refresh recovery time delay (tRFC (min.)), LSB 00h 160ns 00h 160ns 25 SDRAM minimum refresh recovery time delay (tRFC (min.)), MSB 05h 160ns 05h 160ns 26 SDRAM minimum internal write to read command delay (tWTR (min.)) 3Ch 7.5ns 3Ch 7.5ns 27 SDRAM minimum internal read to precharge command delay (tRTP (min.)) 3Ch 7.5ns 3Ch 7.5ns 28 Upper nibble for tFAW 00h 30ns 00h 30ns 29 Minimum four activate window delay time (tFAW (min.)) F0h 30ns F0h 30ns 30 SDRAM optional features 83h DLL-off, RZQ/6, 7 83h DLL-off, RZQ/6, 7 31 SDRAM thermal and refresh options 81h PASR/2X refresh at +85ºC to +95ºC 81h PASR/2X refresh at +85ºC to +95ºC 32 Module thermal sensor 00h Not incorporated 00h Not incorporated 33 SDRAM device type 00h Standard 00h Standard 34 to 59 Reserved 00h — 00h — |
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