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EDJ1108BDBG-GL-F Datasheet(PDF) 4 Page - Elpida Memory |
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EDJ1108BDBG-GL-F Datasheet(HTML) 4 Page - Elpida Memory |
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4 / 147 page  EDJ1108BDBG Data Sheet E1544E30 (Ver. 3.0) 4 CONTENTS Specifications.................................................................................................................................................1 Features.........................................................................................................................................................1 Ordering Information......................................................................................................................................2 Part Number ..................................................................................................................................................2 Pin Configurations .........................................................................................................................................3 Electrical Conditions ......................................................................................................................................6 Absolute Maximum Ratings .......................................................................................................................... 6 Operating Temperature Condition ................................................................................................................ 6 Recommended DC Operating Conditions (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................... 7 AC and DC Input Measurement Levels (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V)....................... 7 VREF Tolerances ......................................................................................................................................... 8 Input Slew Rate Derating .............................................................................................................................. 9 AC and DC Logic Input Levels for Differential Signals................................................................................ 15 AC and DC Output Measurement Levels (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) .................. 20 AC Overshoot/Undershoot Specification..................................................................................................... 22 Output Driver Impedance............................................................................................................................ 23 On-Die Termination (ODT) Levels and I-V Characteristics .........................................................................25 ODT Timing Definitions............................................................................................................................... 27 IDD Measurement Conditions (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................................... 31 Electrical Specifications...............................................................................................................................44 DC Characteristics 1 (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................................................. 44 DC Characteristics 2 (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................................................. 45 Pin Capacitance (TC = 25 °C, VDD, VDDQ = 1.5V ± 0.075V)..................................................................... 46 Standard Speed Bins.................................................................................................................................. 47 AC Characteristics (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V, VSS, VSSQ = 0V)....................... 50 Block Diagram .............................................................................................................................................63 Pin Function.................................................................................................................................................64 Command Operation ...................................................................................................................................66 Command Truth Table................................................................................................................................ 66 CKE Truth Table ......................................................................................................................................... 70 Simplified State Diagram .............................................................................................................................71 RESET and Initialization Procedure ............................................................................................................72 Power-Up and Initialization Sequence ........................................................................................................ 72 Reset and Initialization with Stable Power .................................................................................................. 73 Programming the Mode Register.................................................................................................................74 Mode Register Set Command Cycle Time (tMRD) .....................................................................................74 MRS Command to Non-MRS Command Delay (tMOD) ............................................................................. 74 DDR3 SDRAM Mode Register 0 [MR0] ...................................................................................................... 75 DDR3 SDRAM Mode Register 1 [MR1] ...................................................................................................... 76 |
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