This Data Sheet may be revised by subsequent versions

©2004 Eon Silicon Solution, Inc.,

www.eonssi.com

or modifications due to changes in technical specifications.

8

EN25F40

Rev. I, Issue Date: 2010/05/31

Status Register

Content

Memory Content

BP2

Bit

BP1

Bit

BP0

Bit

Protect Areas

Addresses

Density(KB)

Portion

0

0

0

None

None

None

None

0

0

1

Sector 0 to 125

000000h-07DFFFh

504KB

Lower 126/128

0

1

0

Sector 0 to 123

000000h-07BFFFh

496KB

Lower 124/128

0

1

1

Sector 0 to 119

000000h-077FFFh

480KB

Lower 120/128

1

0

0

Sector 0 to 111

000000h-06FFFFh

448KB

Lower 112/128

1

0

1

Sector 0 to 95

000000h-05FFFFh

384KB

Lower 96/128

1

1

0

Sector 0 to 63

000000h-03FFFFh

256KB

Lower 64/128

1

1

1

All

000000h-07FFFFh

512KB

All

Hold Function

The Hold (HOLD) signal is used to pause any serial communications with the device without resetting

the clocking sequence. However, taking this signal Low does not terminate any Write Status Register,

Program or Erase cycle that is currently in progress.

To enter the Hold condition, the device must be selected, with Chip Select (CS#) Low. The Hold

condition starts on the falling edge of the Hold (HOLD) signal, provided that this coincides with Serial

Clock (CLK) being Low (as shown in Figure 4.).

The Hold condition ends on the rising edge of the Hold (HOLD) signal, provided that this coincides with

Serial Clock (CLK) being Low.

If the falling edge does not coincide with Serial Clock (CLK) being Low, the Hold condition starts after

Serial Clock (CLK) next goes Low. Similarly, if the rising edge does not coincide with Serial Clock (CLK)

being Low, the Hold condition ends after Serial Clock (CLK) next goes Low. (This is shown in Figure 4.).

During the Hold condition, the Serial Data Output (DO) is high impedance, and Serial Data Input (DI)

and Serial Clock (CLK) are Don’t Care.

Normally, the device is kept selected, with Chip Select (CS#) driven Low, for the whole duration of the

Hold condition. This is to ensure that the state of the internal logic remains unchanged from the moment

of entering the Hold condition.

If Chip Select (CS#) goes High while the device is in the Hold condition, this has the effect of resetting

the internal logic of the device. To restart communication with the device, it is necessary to drive Hold

(HOLD) High, and then to drive Chip Select (CS#) Low. This prevents the device from going back to the

Hold condition.

Figure 4. Hold Condition Waveform

INSTRUCTIONS