This Data Sheet may be revised by subsequent versions

©2004 Eon Silicon Solution, Inc.,

www.eonssi.com

or modifications due to changes in technical specifications.

11

EN25F20

Rev. E, Issue Date: 2008/12/15

Figure 6. Write Disable Instruction Sequence Diagram

Read Status Register (RDSR) (05h)

The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status

Register may be read at any time, even while a Program, Erase or Write Status Register cycle is in

progress. When one of these cycles is in progress, it is recommended to check the Write In Progress

(WIP) bit before sending a new instruction to the device. It is also possible to read the Status Register

continuously, as shown in Figure 7.

Figure 7. Read Status Register Instruction Sequence Diagram

Table 6. Status Register Bit Locations

S7

S6

S5

S4

S3

S2

S1

S0

SRP

Status Register

Protect

OTP_LOCK

bit

(note 1)

BP2

(Block Protected

bits)

BP1

(Block Protected

bits)

BP0

(Block Protected

bits)

WEL

(Write Enable

Latch)

WIP

(Write In

Progress bit)

1 = status

register write

disable

1 = OTP

sector is

protected

(note 2)

(note 2)

(note 2)

1 = write

enable

0 = not write

enable

1 = write

operation

0 = not in write

operation

Non-volatile bit

Reserved

bits

Reserved

bits

Non-volatile bit

Non-volatile bit

Non-volatile bit

volatile bit

volatile bit

Note

1. In OTP mode, SRP bit is served as OTP_LOCK bit.

2. See the table “

Protected Area Sizes Sector Organization”.