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MMA26XXNKW Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc

Part # MMA26XXNKW
Description  DSI Inertial Sensor
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MMA26XXNKW Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc

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Sensors
4
Freescale Semiconductor, Inc.
MMA26xxNKW
1
Pin Connections
Figure 4. Block Diagram
Table 1. Pin Description
Pin
Pin
Name
Formal Name
Definition
1
TEST2
Test Pin
This pin must be left unconnected in the application.
2
TEST3
Test Pin
This pin must be grounded in the application.
3
TEST1
Test Pin
This pin must be grounded in the application.
4
BUSRTN
Ground
This pin is the common return for power and signalling.
5
PCM
PCM
Output
This pin provides a 4 MHz PCM signal proportional to the acceleration data for test purposes. The output can be enabled or
disabled via OTP. If unused, this pin must be left unconnected in the application. Reference Section 3.5.3.6.
6
VSSB
Ground
This pin must be grounded in the application.
7
BUSIN
Supply /
Comm
This pin is connected to the DSI positive bus node and provides the power supply and communication to the system master.
An external capacitor must be connected to between this pin and the BUSRTN pin. Reference Figure 1.
8
HCAP
Hold Capacitor
This pin rectifies the supply voltage on the BUSIN pin to create the supply voltage for the device. An external capacitor must
be connected between this pin and the BUSRTN pin to store energy for operation during master communication signalling.
Reference Figure 1.
9
CREG
Digital
Supply
This pin is connected to the power supply for the internal digital circuitry. An external capacitor must be connected between
this pin and VSS. Reference Figure 1.
10
TEST4
Test Pin
This pin must be grounded in the application.
11
CREGA
Analog
Supply
This pin is connected to the power supply for the internal analog circuitry. An external capacitor must be connected between
this pin and VSSA. Reference Figure 1.
12
VSSA
Analog GND
This pin is the power supply return node for analog circuitry.
13
TEST5
Test Pin
This pin enables test mode, and provides the SPI programming voltage in test mode. This pin is must be grounded in the
application.
14
TEST6
Test Pin
This pin must be grounded in the application.
15
TEST7
Test Pin
This pin must be grounded in the application.
16
VSS
Digital GND
This pin is the power supply return node for the digital circuitry.
17
PAD
Die Attach Pad
This pin is the die attach flag, and should be connected to VSS in the application. Reference Section 5.
Corner
Pads
Corner Pads
The corner pads are internally connected to VSS.
TEST2
BUSRTN
CREGA
TEST4
CREG
TEST3
TEST1
VSSA
1
2
3
4
5
6
7
8
12
11
10
9
16 15 14 13
17


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