TLE 4270

Semiconductor Group

2

1998-11-01

Pin Configuration

(top view)

Figure 1

Pin Definitions and Functions

Pin

Symbol

Function

1

I

Input; block to ground directly on the IC with ceramic capacitor

2RO

Reset Output; the open collector output is connected to the 5 V output

via an integrated resistor of 30 k

Ω.

3GND

Ground; internally connected to heatsink.

4D

Reset Delay; connect a capacitor to ground for delay time adjustment.

5Q

5-V Output; block to ground with 22

µF capacitor, ESR < 3 Ω.

AEP01922

Ι

RO

GND

D

Q

15

P-TO263-5-1

(P-TO220-5-8)

AEP01923

Ι

RO

GND

D

Q

5

1

P-TO220-5-11

(P-TO220-5-1)

P-TO220-5-12

(P-TO220-5-2)

AEP02172

RO

GND

D

Q

5

1

Ι

P-TO252-5-1 (D-PAK)

AEP02580

15

RO

Ι

DQ

GND