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SP9500AS Datasheet(PDF) 4 Page - Sipex Corporation |
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SP9500AS Datasheet(HTML) 4 Page - Sipex Corporation |
4 / 9 page SP9500DS/04 SP9500 12-Bit, Voltage Output D/A Converter © Copyright 2000 Sipex Corporation 4 THEORY OF OPERATION The SP9500 consists of four main functional blocks – the input shift register, DAC register, 12-Bit D/A converter and a output buffer amplifier, Figure 1. The input shift register is used to convert the serial input data stream to a parallel 12–Bit digital word. The input data is shifted on posi- tive clock (SCLK) edges when the Chip Select (CS) signal is in the “low” state. The MSB is loaded first and LSB last. No shifting of the input data occurs when the Chip Select (CS) signal is in the “high” state. The DAC register is used to store the digital word which is sent to the R–2R DAC. Its value is updated on the positive transition of the Chip Select (CS) signal. The 12–Bit D/A converter is an “inverted” R-2R ladder network. The DAC itself is implemented with precision thin-film resistors and CMOS transmission gate switches. The resistor net- work is laser-trimmed to achieve better than 12– Bit accuracy. The D/A converter is used to convert the 12-bit input word to a precision voltage. The operational amplifier is a rail-to-rail input, rail-to-rail output CMOS amplifier. It is capable of supplying 1mA of load current in the 1.5 to 3.5 output voltage range. The initial offset volt- age is laser-trimmed to improve accuracy. Set- tling time is 7.5 µs for a full scale output transi- tion to 0.012% accuracy. INPUT OUTPUT MSB LSB 1111 1111 1111 V REF - 1 LSB 1111 1111 1110 V REF - 2 LSB 0000 0000 0001 AGND + 1 LSB 0000 0000 0000 AGND (V REF-AGND) 2 12 1 LSB = Table 1. Binary Coding FEATURES... The SP9500 is a low power 12–Bit Digital-to- Analog Converter. The converter features 0.5 to 4.5 volt output swings with a single +5V supply. The input coding format used is standard binary, Table 1. This Digital-to Analog Converter uses a stan- dard 3–wire interface compatible with SPI™, QSPI™ and Microwire™. The output settling time is specified at 7.5 µs to full 12-bit accuracy when driving a 10K Ω, 10pF load combination. The SP9500 Digital-to-Analog Converter is ideally suited for applications such as ATE, process controllers, robotics and instrumenta- tion. The SP9500 is available in an 8-pin 0.15" SOIC and 0.3" PDIP packages, specified over commercial and industrial temperature ranges. PIN ASSIGNMENTS Pin 1- V OUT - Voltage Output. Pin 2- V DD - +5V Power Supply Input. Pin 3- SCLK - Serial Clock Input. Pin 4- D IN - Serial Data Input. Pin 5- CS - Chip Select Input. Pin 6 - DGND - Digital Ground Pin 7- AGND - Analog Ground. Pin 8- V REF - Reference Input. VOUT 1 2 3 4 8 7 6 5 VDD DIN VREF DGND CS AGND SCLK SP9500 PINOUT – 8-PIN PLASTIC DIP & SOIC |
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