MAXQ618

16-Bit Microcontroller with Infrared Module

10

Pin Description (continued)

PIN

NAME

FUNCTION

BARE DIE

TQFN-EP

Port 1 General-Purpose, Digital I/O Pins with Interrupt Capability. These port pins

function as general-purpose I/O pins with their input and output states controlled by

the PD1, PO1, and PI1 registers. All port pins default to high-impedance mode after a

reset. Software must configure these pins after release from reset to remove the high-

impedance condition. All external interrupts must be enabled from software before they

can be used.

GPIO PORT PIN

EXTERNAL INTERRUPT

33

33

P1.0/INT0

P1.0

INT0

35

34

P1.1/INT1

P1.1

INT1

36

35

P1.2/INT2

P1.2

INT2

38

36

P1.3/INT3

P1.3

INT3

39

37

P1.4/INT4

P1.4

INT4

40

38

P1.5/INT5

P1.5

INT5

41

39

P1.6/INT6

P1.6

INT6

42

40

P1.7/INT7

P1.7

INT7

Port 2 General-Purpose, Digital I/O Pins. These port pins function as general-purpose

I/O pins with their input and output states controlled by the PD2, PO2, and PI2 registers.

All port pins default to high-impedance mode after a reset. Software must configure

these pins after release from reset to remove the high-impedance condition. All special

functions must be enabled from software before they can be used.

GPIO PORT PIN

SPECIAL FUNCTION

9

8

P2.0/MOSI

P2.0

SPI: Master Out-Slave In

10

9

P2.1/MISO

P2.1

SPI: Master In-Slave Out

11

10

P2.2/SCLK

P2.2

SPI: Slave Clock

12

11

P2.3/SSEL

P2.3

SPI: Active-Low Slave Select

28

29

P2.4/TCK

P2.4

JTAG: Test Clock

29

30

P2.5/TDI

P2.5

JTAG: Test Data In

30

31

P2.6/TMS

P2.6

JTAG: Test Mode Select

31

32

P2.7/TDO

P2.7

JTAG: Test Data Out

Port 3 General-Purpose, Digital I/O Pins with Interrupt Capability. These port pins

function as general-purpose I/O pins with their input and output states controlled by

the PD3, PO3, and PI3 registers. All port pins default to high-impedance mode after a

reset. Software must configure these pins after release from reset to remove the high-

impedance condition. All external interrupts must be enabled from software before they

can be used.

GPIO PORT PIN

EXTERNAL INTERRUPT

19

18

P3.0/INT8

P3.0

INT8

20

19

P3.1/INT9

P3.1

INT9

21

20

P3.2/INT10

P3.2

INT10

22

21

P3.3/INT11

P3.3

INT11

23

22

P3.4/INT12

P3.4

INT12

24

23

P3.5/INT13

P3.5

INT13

25

24

P3.6/INT14

P3.6

INT14

26

25

P3.7/INT15

P3.7

INT15