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SP813MEP Datasheet(PDF) 11 Page - Sipex Corporation |
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SP813MEP Datasheet(HTML) 11 Page - Sipex Corporation |
11 / 18 page 11 SP705DS/09 SP705 Low Power Microprocessor Supervisory Circuits © Copyright 2000 Sipex Corporation Power-Fail Comparator The power-fail comparator can be used for various purposes because its output and noninverting input are not internally connected. The inverting input is internally connected to a 1.25V reference. To build an early-warning circuit for power failure, connect the PFI pin to a voltage divider as shown in Figure 16. Choose the voltage divider ratio so that the voltage at PFI falls below 1.25V just before the +5V regulator drops out. Use PFO to interrupt the µP so it can prepare for an orderly power-down. Manual Reset The manual-reset input (MR) allows RESET to be triggered by a pushbutton switch. The switch is effectively debounced by the 140ms mini- mum RESET pulse width. MR is TTL/CMOS logic compatible, so it can be driven by an external logic line. MR can be used to force a watchdog timeout to generate a RESET pulse in the SP705/706/813L/813M. Simply connect WDO to MR. Ensuring a Valid RESET Output Down to V CC = 0V When V CC falls below 1V, the SP705/706/707/ 708 RESET output no longer sinks current, it becomes an open circuit. High-impedance CMOS logic inputs can drift to undetermined voltages if left undriven. If a pull-down resistor is added to the RESET pin, any stray charge or leakage currents will be shunted to ground, holding RESET LOW. The resistor value is not critical. It should be about 100K Ω,largeenough not to load RESET and small enough to pull RESET to ground. Monitoring Voltages Other Than the Unregulated DC Input Monitor voltages other than the unregulated DC by connecting a voltage divider to PFI and adjusting the ratio appropriately. If required, add hysteresis by connecting a resistor (with a value approximately 10 times the sum of the two resistors in the potential divider network) between PFI and PFO. A capacitor between PFI and GND will reduce the power-fail circuit's PFI PFO VCC +5V GND RESET to µP MR +12V 1M Ω 1% 130K Ω 1% Figure 17. Monitoring Both +5V and +12V Power Supplies GND GND RESET INTERRUPT I/O LINE VCC RESET PFO PFI R2 R1 Unregulated DC Power Supply Regulated +5V Power Supply VCC 0.1 µF PFI µP NMI WDO PUSHBUTTON SWITCH MR SP705 SP706 SP813L SP813M Figure 16. Typical Operating Circuit |
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