 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
CY8C3246AXI-131 Datasheet(PDF) 11 Page - Cypress Semiconductor |
|
||||||||||||||||||||||||||||||
CY8C3246AXI-131 Datasheet(HTML) 11 Page - Cypress Semiconductor |
|
|
11 / 122 page  PSoC® 3: CY8C32 Family Data Sheet Document Number: 001-56955 Rev. *N Page 11 of 122 USBIO, D+ Provides D+ connection directly to a USB 2.0 bus. May be used as a digital I/O pin. Pins are Do Not Use (DNU) on devices without USB. USBIO, D– Provides D– connection directly to a USB 2.0 bus. May be used as a digital I/O pin. Pins are No Connect (NC) on devices without USB. VBOOST Power sense connection to boost pump. VBAT Battery supply to boost pump. VCCA. Output of the analog core regulator or the input to the analog core. Requires a 1uF capacitor to VSSA. The regulator output is not designed to drive external circuits. Note that if you use the device with an external core regulator (externally regulated mode), the voltage applied to this pin must not exceed the allowable range of 1.71 V to 1.89 V. When using the internal core regulator, (internally regulated mode, the default), do not tie any power to this pin. For details see Power System on page 29. VCCD. Output of the digital core regulator or the input to the digital core. The two VCCD pins must be shorted together, with the trace between them as short as possible, and a 1uF capacitor to VSSD. The regulator output is not designed to drive external circuits. Note that if you use the device with an external core regulator (externally regulated mode), the voltage applied to this pin must not exceed the allowable range of 1.71 V to 1.89 V. When using the internal core regulator (internally regulated mode, the default), do not tie any power to this pin. For details see Power System on page 29. VDDA Supply for all analog peripherals and analog core regulator. VDDA must be the highest voltage present on the device. All other supply pins must be less than or equal to VDDA. VDDD Supply for all digital peripherals and digital core regulator. VDDA must be less than or equal to VDDA. VSSA Ground for all analog peripherals. VSSB Ground connection for boost pump. VSSD Ground for all digital logic and I/O pins. VDDIO0, VDDIO1, VDDIO2, VDDIO3 Supply for I/O pins. See pinouts for specific I/O pin to VDDIO mapping. Each VDDIO must be tied to a valid operating voltage (1.71 V to 5.5 V), and must be less than or equal to VDDA. XRES (and configurable XRES) External reset pin. Active low with internal pull-up. Pin P1[2] may be configured to be a XRES pin; see “Nonvolatile Latches (NVLs)” on page 23. 4. CPU 4.1 8051 CPU The CY8C32 devices use a single cycle 8051 CPU, which is fully compatible with the original MCS-51 instruction set. The CY8C32 family uses a pipelined RISC architecture, which executes most instructions in 1 to 2 cycles to provide peak performance of up to 24 MIPS with an average of 2 cycles per instruction. The single cycle 8051 CPU runs ten times faster than a standard 8051 processor. The 8051 CPU subsystem includes these features: Single cycle 8051 CPU Up to 64 KB of flash memory, up to 2 KB of EEPROM, and up to 8 KB of SRAM 512-byte instruction cache between CPU and flash Programmable nested vector interrupt controller Direct memory access (DMA) controller Peripheral HUB (PHUB) External memory interface (EMIF) 4.2 Addressing Modes The following addressing modes are supported by the 8051: Direct Addressing: The operand is specified by a direct 8-bit address field. Only the internal RAM and the SFRs can be accessed using this mode. Indirect Addressing: The instruction specifies the register which contains the address of the operand. The registers R0 or R1 are used to specify the 8-bit address, while the data pointer (DPTR) register is used to specify the 16-bit address. Register Addressing: Certain instructions access one of the registers (R0 to R7) in the specified register bank. These instructions are more efficient because there is no need for an address field. Register Specific Instructions: Some instructions are specific to certain registers. For example, some instructions always act on the accumulator. In this case, there is no need to specify the operand. Immediate Constants: Some instructions carry the value of the constants directly instead of an address. Indexed Addressing: This type of addressing can be used only for a read of the program memory. This mode uses the data pointer as the base and the accumulator value as an offset to read a program memory. Bit Addressing: In this mode, the operand is one of 256 bits. |
Similar Part No. - CY8C3246AXI-131 |
|
Similar Description - CY8C3246AXI-131 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
