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CY8C20496A-24LQXI Datasheet(PDF) 2 Page - Cypress Semiconductor |
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CY8C20496A-24LQXI Datasheet(HTML) 2 Page - Cypress Semiconductor |
2 / 47 page CY8C20X36A/46A/66A/96A/46AS/66AS Document Number: 001-54459 Rev. *O Page 2 of 47 Logic Block Diagram CAPSENSE SYSTEM 1K/2K SRAM Interrupt Controller Sleep and Watchdog Multiple Clock Sources Internal Low Speed Oscillator (ILO) 6/12/24 MHz Internal Main Oscillator (IMO) PSoC CORE CPU Core (M8C) Supervisory ROM (SROM) 8K/16K/32K Flash Nonvolatile Memory SYSTEM RESOURCES SYSTEM BUS Analog Reference SYSTEM BUS Port 3 Port 2 Port 1 Port 0 CapSense Module Global Analog Interconnect 1.8/2.5/3V LDO Analog Mux Two Comparators I2C Slave SPI Master/ Slave POR and LVD USB System Resets Internal Voltage References Three 16-Bit Programmable Timers PWRSYS (Regulator) Port 4 Digital Clocks [2] Note 2. Internal voltage regulator for internal circuitry |
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