CY14B101LA

CY14B101NA

Document Number: 001-42879 Rev. *O

Page 8 of 29

Preventing AutoStore

The AutoStore function is disabled by initiating an AutoStore

disable sequence. A sequence of read operations is performed

in a manner similar to the Software STORE initiation. To initiate

the AutoStore disable sequence, the following sequence of CE

or OE controlled read operations must be performed:

1. Read address 0x4E38 Valid READ

2. Read address 0xB1C7 Valid READ

3. Read address 0x83E0 Valid READ

4. Read address 0x7C1F Valid READ

5. Read address 0x703F Valid READ

6. Read address 0x8B45 AutoStore Disable

The AutoStore is reenabled by initiating an AutoStore enable

sequence. A sequence of read operations is performed in a

manner similar to the Software RECALL initiation. To initiate the

AutoStore enable sequence, the following sequence of CE or OE

controlled read operations must be performed:

1. Read address 0x4E38 Valid READ

2. Read address 0xB1C7 Valid READ

3. Read address 0x83E0 Valid READ

4. Read address 0x7C1F Valid READ

5. Read address 0x703F Valid READ

6. Read address 0x4B46 AutoStore Enable

If the AutoStore function is disabled or reenabled, a manual

STORE operation (Hardware or Software) must be issued to

save the AutoStore state through subsequent power-down

cycles. The part comes from the factory with AutoStore enabled

and 0x00 written in all cells.

Data Protection

The CY14B101LA/CY14B101NA protects data from corruption

during low voltage conditions by inhibiting all externally initiated

STORE and write operations. The low voltage condition is

detected

when

is

less

than

If

the

CY14B101LA/CY14B101NA is in a write mode (both CE and WE

are LOW) at power-up, after a RECALL or STORE, the write is

active). This protects against inadvertent writes during power-up

or brown out conditions.

L

H

L

X

0x4E38

0xB1C7

0x83E0

0x7C1F

0x703F

0x4B46

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

AutoStore

Enable

Output data

Output data

Output data

Output data

Output data

Output data

Active[18]

L

H

L

X

0x4E38

0xB1C7

0x83E0

0x7C1F

0x703F

0x8FC0

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile

STORE

Output data

Output data

Output data

Output data

Output data

Output high Z

[18]

L

H

L

X

0x4E38

0xB1C7

0x83E0

0x7C1F

0x703F

0x4C63

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile

RECALL

Output data

Output data

Output data

Output data

Output data

Output high Z

Active[18]

Table 1. Mode Selection (continued)

CE

WE

OE

[16]

Mode

I/O

Power

Note

18. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.