Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

CY14MB064Q Datasheet(PDF) 8 Page - Cypress Semiconductor

Part # CY14MB064Q
Description  64-Kbit (8 K 횞 8) SPI nvSRAM
Download  30 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY14MB064Q Datasheet(HTML) 8 Page - Cypress Semiconductor

Back Button CY14MB064Q_12 Datasheet HTML 4Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 5Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 6Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 7Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 8Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 9Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 10Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 11Page - Cypress Semiconductor CY14MB064Q_12 Datasheet HTML 12Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 30 page
background image
CY14MB064Q
CY14ME064Q
Document Number: 001-65018 Rev. *D
Page 8 of 30
SPI Operating Features
Power-Up
Power-up is defined as the condition when the power supply is
turned on and VCC crosses Vswitch voltage.
As described earlier, at power-up nvSRAM performs a Power-Up
RECALL operation for tFA duration during which, all memory
accesses are disabled. The HSB pin can be probed to check the
Ready/Busy status of nvSRAM after power-up.
The following are the device status after power-up.
Selected (Active power mode) if CS pin is LOW
Deselected (Standby power mode) if CS pin is HIGH
Not in the Hold condition
Status Register state:
Write Enable (WEN) bit is reset to ‘0’.
WPEN, BP1, BP0 unchanged from previous STORE
operation.
The WPEN, BP1, and BP0 bits of the Status Register are
nonvolatile bits and remain unchanged from the previous
STORE operation.
Power-Down
At power-down (continuous decay of VCC), when VCC drops from
the normal operating voltage and below the VSWITCH threshold
voltage, the device stops responding to any instruction sent to it.
If a write cycle is in progress and the last data bit D0 has been
received when the power goes down, it is allowed tDELAY time to
complete the write. After this, all memory accesses are inhibited
and a conditional AutoStore operation is performed (AutoStore is
not performed if no writes have happened since the last RECALL
cycle). This feature prevents inadvertent writes to nvSRAM from
happening during power-down.
However, to completely avoid the possibility of inadvertent writes
during power-down, ensure that the device is deselected and is
in standby power mode, and the CS follows the voltage applied
on VCC.
Active Power and Standby Power Modes
When CS is LOW, the device is selected and is in the active
power mode. The device consumes ICC current, as specified in
DC Electrical Characteristics on page 18. When CS is HIGH, the
device is deselected and the device goes into the standby power
mode after tSB time if a STORE or RECALL cycle is not in
progress. If a STORE/RECALL cycle is in progress, the device
goes into the standby power mode after the STORE or RECALL
cycle is completed. In the standby power mode, the current
drawn by the device drops to ISB.


Similar Part No. - CY14MB064Q_12

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY14MB064Q1A-SXI CYPRESS-CY14MB064Q1A-SXI Datasheet
938Kb / 29P
   64-Kbit (8 K x 8) SPI nvSRAM Infinite read, write, and RECALL cycles
CY14MB064Q1A-SXIT CYPRESS-CY14MB064Q1A-SXIT Datasheet
938Kb / 29P
   64-Kbit (8 K x 8) SPI nvSRAM Infinite read, write, and RECALL cycles
CY14MB064Q1B CYPRESS-CY14MB064Q1B Datasheet
913Kb / 28P
   64-Kbit (8 K 횞 8) SPI nvSRAM
CY14MB064Q1B CYPRESS-CY14MB064Q1B Datasheet
913Kb / 28P
   64-Kbit (8 K x 8) SPI nvSRAM
CY14MB064Q1B-SXI CYPRESS-CY14MB064Q1B-SXI Datasheet
913Kb / 28P
   64-Kbit (8 K 횞 8) SPI nvSRAM
More results

Similar Description - CY14MB064Q_12

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY14MB064Q1B CYPRESS-CY14MB064Q1B Datasheet
913Kb / 28P
   64-Kbit (8 K 횞 8) SPI nvSRAM
CY14C512Q CYPRESS-CY14C512Q_12 Datasheet
1Mb / 32P
   512-Kbit (64 K 횞 8) SPI nvSRAM
CY14B512Q1 CYPRESS-CY14B512Q1_12 Datasheet
1Mb / 27P
   512-Kbit (64 K 횞 8) Serial (SPI) nvSRAM
CY14B512Q1 CYPRESS-CY14B512Q1 Datasheet
1Mb / 27P
   512-Kbit (64 K 횞 8) Serial (SPI) nvSRAM
CY14MB064Q1B CYPRESS-CY14MB064Q1B_13 Datasheet
913Kb / 28P
   64-Kbit (8 K x 8) SPI nvSRAM
CY14MB064J1A CYPRESS-CY14MB064J1A Datasheet
1Mb / 28P
   64-Kbit (8 K 횞 8) Serial (I2C) nvSRAM
CY14C064PA CYPRESS-CY14C064PA_12 Datasheet
1Mb / 43P
   64-Kbit (8 K 횞 8) SPI nvSRAM with Real Time Clock
CY14MB064J CYPRESS-CY14MB064J_12 Datasheet
1Mb / 30P
   64-Kbit (8 K 횞 8) Serial (I2C) nvSRAM
CY14C256Q CYPRESS-CY14C256Q_12 Datasheet
1Mb / 32P
   256-Kbit (32 K 횞 8) SPI nvSRAM
CY14C512PA CYPRESS-CY14C512PA_13 Datasheet
1Mb / 42P
   512-Kbit (64 K x 8) SPI nvSRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com