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CY23FS08OXIT Datasheet(PDF) 5 Page - Cypress Semiconductor |
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CY23FS08OXIT Datasheet(HTML) 5 Page - Cypress Semiconductor |
5 / 15 page CY23FS08 Document Number: 38-07518 Rev. *F Page 5 of 15 Figure 3. Fail#/Safe Timing Formula Figure 4. FailSafe Timing Diagram: Input Reference Slowly Drifting Out of FailSafe Capture Range Table 3. Failsafe Timing Table Parameter Description Conditions Min Max Unit tFSL Fail#/Safe Assert Delay Measured at 80% to 20%, Load = 15 pF See Figure 3 ns tFSH Fail#/Safe Deassert Delay Measured at 80% to 20%, Load = 15 pF See Figure 3 ns Reference + 300 ppm Reference - 300 ppm Reference Output + 300 ppm Output - 300 ppm Output Fail#/Safe t FSH Reference Off t FSL Time [+] Feedback |
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