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MCM69L737AZP9.5R Datasheet(PDF) 8 Page - Motorola, Inc |
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MCM69L737AZP9.5R Datasheet(HTML) 8 Page - Motorola, Inc |
8 / 20 page MCM69L737A •MCM69L819A 8 MOTOROLA FAST SRAM The table of timing values shows either a mini- mum or a maximum limit for each parameter. Input requirements are specified from the external system point of view. Thus, address setup time is shown as a minimum since the system must supply at least that much time. On the other hand, responses from the memory are specified from the device point of view. Thus, the access time is shown as a maximum since the device never provides data later than that time. TIMING LIMITS DEVICE UNDER TEST 50 Ω 50 Ω VDDQ/2 Figure 1. AC Test Load VOH VSS 50% 100% 20% tKHKH Figure 2. Undershoot Voltage CROSSING POINT VDDQ VSS VTR VDIF VCP VCM* Figure 3. Differential Inputs/Common Mode Input Voltage *VCM, the Common Mode Input Voltage, equals VTR – ((VTR – VCP)/2). |
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