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ADS7871IDB Datasheet(PDF) 1 Page - Texas Instruments |
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ADS7871IDB Datasheet(HTML) 1 Page - Texas Instruments |
1 / 44 page ADS7871 SLAS370C − APRIL 2002 − REVISED OCTOBER 2004 14BIT, 48KSPS, DATA ACQUISITION SYSTEM WITH ANALOGTODIGITAL CONVERTER, MUX, PGA, AND REFERENCE FEATURES D PGA Gains: 1, 2, 4, 5, 8, 10, 16, 20 V/V D Programmable Input (Up to 4-Channel Differential/Up to 8-Channel Single-Ended or Some Combination) D 1.15-V, 2.048-V, or 2.5-V Internal Reference D SPI/DSP Compatible Serial Interface ( ≤ 20 MHz) D Throughput Rate: 48 kSamples/sec D Error Overload Indicator D Programmable Output 2s Complement/Binary D 2.7-V to 5.5-V Single Supply Operation D 4-Bit Digital I/O Via Serial Interface D Pin-Compatible With ADS7870 D SSOP-28 Package APPLICATIONS D Portable Battery-Powered Systems D Low-Power Instrumentation D Low-Power Control Systems D Smart Sensor Applications DESCRIPTION The ADS7871 (US patents 6140872, 6060874) is a complete low power data acquisition system on a single chip. It consists of a 4-channel differential/8-channel single-ended multiplexer, precision programmable gain amplifier, 14-bit successive approximation analog-to- digital (A/D) converter, and a precision voltage reference. The programmable-gain amplifier provides high input impedance, excellent gain accuracy, good common-mode rejection, and low noise. For many low-level signals, no external amplification or impedance buffering is needed between the signal source and the A/D input. The offset voltage of the PGA is auto-zeroed. Gains of 1, 2, 4, 5, 8, 10, 16, and 20 V/V allow signals as low as 125 mV to produce full-scale digital outputs. The ADS7871 contains an internal reference, which is trimmed for high initial accuracy and stability vs temperature. Drift is typically 10 ppm/ °C. An external reference can be used in situations where multiple ADS7871s share a common reference. The serial interface allows the use of SPI, QSPI, Microwire, and 8051-family protocols, without glue logic. 14-BIT A/D MUX Serial Interface SCLK CS Digital I/O I/O0 I/O2 I/O3 I/O1 LN0 LN2 LN3 LN1 LN4 LN6 LN7 LN5 Registers PGA _ + RESET RISE/FALL DIN DOUT BUSY CONVERT BUFOUT/REFIN BUFIN Oscillator CCLK OSC ENABLE REF VREF PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002−2004, Texas Instruments Incorporated All trademarks are the property of their respective owners. |
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