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AT24CS08-MAUM-T Datasheet(PDF) 4 Page - ATMEL Corporation |
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AT24CS08-MAUM-T Datasheet(HTML) 4 Page - ATMEL Corporation |
4 / 24 page 4 Atmel AT24CS04/08 [PRELIMINARY DATASHEET] 8766B–SEEPR–8/12 5. Pin Description Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. Device Addresses (A2, A1): The AT24CS04 uses the A2 and A1 inputs for hard wire addressing allowing a total of four 4-Kbit devices to be addressed on a single bus system. Pin 1 is a no connect and can be connected to ground. The AT24CS08 only uses the A2 input for hardware addressing and a total of two 8K devices may be addressed on a single bus system. Pins 1 and 2 are no connects and can be connected to ground. Refer to Section 8. “Device Addressing” on page 10 for details about the pin state and the required protocol for communication . The device address pins are not available on the SOT23 package offering. Refer to Section 8. “Device Addressing” on page 10 for details on the protocol requirements with this package. Write Protect (WP): AT24CS04/08 has a Write Protect (WP) pin that provides hardware data protection. When the Write Protect pin is connected to ground (GND), normal read/write operations to the full array are possible. When the Write Protect pin is connected to VCC, all write operations to the memory are inhibited but read operations are still possible. This operation is summarized in Table 5-1 below. Table 5-1. Write Protect WP Pin Status Part of the Array Protected Atmel AT24CS04/08 At VCC Full Array At GND Normal Read/Write Operations |
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