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SI4355 Datasheet(PDF) 7 Page - Silicon Laboratories |
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SI4355 Datasheet(HTML) 7 Page - Silicon Laboratories |
7 / 34 page Si4355 Rev 1.0 7 Table 6. Digital IO Specifications (GPIO_x, SCLK, SDO, SDI, nSEL, nIRQ)1 Parameter Symbol Conditions Min Typ Max Units Rise Time TRISE 0.1 x VDD to 0.9 x VDD, CL= 10 pF, DRV<1:0>=HH —2.3 — ns Fall Time TFALL 0.9 x VDD to 0.1 x VDD, CL= 10 pF, DRV<1:0>=HH —2 — ns Input Capacitance CIN —2 — pF Logic High Level Input Voltage VIH VDD x0.7 — — V Logic Low Level Input Voltage VIL —— VDD x0.3 V Input Current IIN 0<VIN <VDD –10 — 10 µA Input Current If Pullup is Activated IINP VIL =0V 1 — 10 µA Drive Strength for Output Low Level2 IOLL DRV<1:0> = LL 2.1 mA IOLH DRV<1:0> = LH 1.5 mA IOHL DRV<1:0> = HL 1.0 mA IOHH DRV<1:0> = HH 0.4 mA Drive Strength for Output High Level (GPIO1, GPIO2, GPIO3)2 IOLL DRV<1:0> = LL 4.5 mA IOLH DRV<1:0> = LH 3.3 mA IOHL DRV<1:0> = HL 2.1 mA IOHH DRV<1:0> = HH 0.7 mA Drive Strength for Output High Level (GPIO0)2 IOLL DRV<1:0> = LL 1.9 mA IOLH DRV<1:0> = LH 1.7 mA IOHL DRV<1:0> = HL 1.3 mA IOHH DRV<1:0> = HH 0.6 mA Logic High Level Output Voltage VOH IOUT = 500 µA VDD x0.8 — — V Logic Low Level Output Voltage VOL IOUT = 500 µA — — VDD x0.2 V Notes: 1. All specifications guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test Conditions" section in "1.1. Definition of Test Conditions" on page 9. 2. GPIO output current measured at 3.3 VDC VDD with VOH = 2.7 VDC and VOL =0.66VDC. |
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