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C8051F397-A-GM Datasheet(PDF) 5 Page - Silicon Laboratories |
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C8051F397-A-GM Datasheet(HTML) 5 Page - Silicon Laboratories |
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5 / 300 page  Preliminary Rev. 0.71 5 C8051F39x/37x 23.4. Accessing the CRC0 Result .......................................................................... 147 23.5. CRC0 Bit Reverse Feature............................................................................ 147 24. Reset Sources ...................................................................................................... 153 24.1. Power-On Reset ............................................................................................ 154 24.2. Power-Fail Reset / VDD Monitor ................................................................... 155 24.3. External Reset ............................................................................................... 157 24.4. Missing Clock Detector Reset ....................................................................... 157 24.5. Comparator0 Reset ....................................................................................... 157 24.6. PCA Watchdog Timer Reset ......................................................................... 157 24.7. Flash Error Reset .......................................................................................... 157 24.8. Software Reset .............................................................................................. 157 25. Power Management Modes................................................................................. 159 25.1. Idle Mode....................................................................................................... 159 25.2. Stop Mode ..................................................................................................... 160 25.3. Suspend Mode .............................................................................................. 160 26. Oscillators and Clock Selection ......................................................................... 162 26.1. System Clock Selection................................................................................. 163 26.2. Programmable Internal High-Frequency (H-F) Oscillator .............................. 164 26.2.1. Internal Oscillator Suspend Mode ......................................................... 164 26.3. Programmable Internal Low-Frequency (L-F) Oscillator ............................... 166 26.3.1. Calibrating the Internal L-F Oscillator.................................................... 166 26.4. Internal Low-Power Oscillator........................................................................ 167 26.5. External Oscillator Drive Circuit..................................................................... 167 26.5.1. External Crystal Mode........................................................................... 167 26.5.2. External RC Example............................................................................ 169 26.5.3. External Capacitor Example.................................................................. 169 27. Port Input/Output ................................................................................................. 171 27.1. Port I/O Modes of Operation.......................................................................... 172 27.1.1. Port Pins Configured for Analog I/O...................................................... 172 27.1.2. Port Pins Configured For Digital I/O...................................................... 172 27.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 173 27.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 173 27.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 174 27.2.3. Assigning Port I/O Pins to External Event Trigger Functions................ 175 27.3. Priority Crossbar Decoder ............................................................................. 176 27.4. Port I/O Initialization ...................................................................................... 178 27.5. Port Match ..................................................................................................... 181 27.6. Special Function Registers for Accessing and Configuring Port I/O ............. 183 28. SMBus0 and SMBus1 (I2C Compatible)............................................................. 190 28.1. Supporting Documents .................................................................................. 191 28.2. SMBus Configuration..................................................................................... 191 28.3. SMBus Operation .......................................................................................... 191 28.3.1. Transmitter vs. Receiver ....................................................................... 192 28.3.2. Arbitration.............................................................................................. 192 28.3.3. Clock Low Extension............................................................................. 192 |
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