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MCF51JE256CLK Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MCF51JE256CLK Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
6 / 47 page MCF51JE256 Datasheet, Rev. 4 Features Freescale Semiconductor 6 SPI1 (FIFO), SPI2 (Serial Peripheral Interfaces) SPI1 and SPI2 provide standard master/slave capability. SPI contains a FIFO buffer in order to increase the throughput for this peripheral. TPM1, TPM2 (Timer/PWM Module) Timer/PWM module can be used for a variety of generic timer operations as well as pulse-width modulation. VREG (Voltage Regulator) Controls power management across the device. XOSC1 and XOSC2 (Crystal Oscillators) These devices incorporate redundant crystal oscillators. One is intended primarily for use by the TOD, and the other by the CPU and other peripherals. Table 2. MCF51JE256/128 Functional Units (continued) Unit Function |
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