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GC5328IZER Datasheet(PDF) 10 Page - Texas Instruments |
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GC5328IZER Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 27 page  22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 AB VSS TEST MODE TDO TCK TMS TX34 TX30 TX26 TX22 TX20 TX18 TX17 TX13 TX9 TX5 TX1 VSSA SYNC DC VSS VSS VSS VSS AA VSS VSS INTER- RUPT TDI TRSTB TX35 TX31 TX27 TX23 TX21 TX19 TX16 TX12 TX8 TX4 TX0 VDD SHV SYNC D DPD VREF VSS VSS VSS Y VSS VSS MVV SS2 VDD VDD SHV TX36 TX32 TX28 TX24 DAC REFP VSS TX15 TX11 TX7 TX3 VDDA VSS DPD CLKC DPD IREF VSS VSS VSS W VSS1 VSS MVV DD2 VDD VSS TX37 TX33 TX29 TX25 DAC REFN VSS TX14 TX10 TX6 TX2 VDD VSS DPD CLK VDD SHV RESET B VSS VSS V UP DATA15 VSS VSS VDD SHV VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS MFIO 33 U UP DATA12 UP DATA13 UP DATA14 VDD VDD VDD VDD VHST LHV VHST LHV VHST LHV VHST LHV VHST LHV VHST LHV VHST LHV VHST LHV VDD VDD VDD VDD MFIO 32 MFIO 31 MFIO 30 T UP DATA9 UP DATA10 UP DATA11 VDD VDD VDD SHV VDD VSS VSS VSS VSS VSS VSS VSS VSS VDD VDD SHV VDD VDD MFIO 29 MFIO 28 MFIO 27 R VPP1 UP DATA7 UP DATA8 VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS1 VSS VSS VDD VDD VDD VDD VDD SHV MFIO 26 MFIO 25 P UP DATA6 VPP1 VDD SHV VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS1 VSS VSS VDD VDD VDD VDD MFIO 24 MFIO 23 MFIO 22 N UP DATA3 UP DATA4 UP DATA5 VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS1 VSS VSS VDD VDD VDD VDD MFIO 21 MFIO 20 MFIO 19 M VSS VSS VDD SHV VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS1 VSS VSS VDD VDD VDD VDD MFIO 18 MFIO 17 MFIO 16 L UP DATA0 UP DATA1 UP DATA2 VDD VDD SHV VDD SHV VDD VSS VSS VSS VSS1 VSS VSS1 VSS VSS VDD VDD SHV VDD SHV VDD VDD SHV MFIO 15 MFIO 14 K RDB CEB OEB VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS1 VSS VSS VDD VDD VDD VDD MFIO 13 MFIO 12 MFIO 11 J UP ADDR WRB VDD SHV VDD VDD1 VDD VDD VSS VSS VSS VSS VSS VSS1 VSS VSS VDD VDD VDD VDD MFIO 10 MFIO 9 MFIO 8 H UP ADDR UP ADDR UP ADDR VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS1 VSS VSS VDD VDD VDD VDD VDD SHV MFIO 7 MFIO 6 G UP ADDR UP ADDR UP ADDR VDD VDD VDD SHV VDD VSS VSS VSS VSS VSS VSS VSS VSS VDD VDD SHV VDD VDD MFIO 5 MFIO 4 VPP F UP ADDR UP ADDR UP ADDR VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VPP MFIO 3 MFIO 2 E VSS VSS VSS VDD SHV VDD VDD VDD VDD SHV VDD SHV VDD SHV VDD SHV VDD SHV1 VDD SHV VDD SHV VDD SHV VDD VDD VDD VDD SHV VSS VSS VSS D VSS VSS VSS BB6 BB10 BB14 VDD SYNC OUT VSS FB33 FB29 VDD FB22 FB18 ADC VREF FB12 VDD FB6 FB3 MFIO 1 VSS VSS C VSS VSS BB2 BB5 BB9 BB13 BBCLK SYNC A VDD FB32 FB28 VDD FB23 FB19 ADC IREF FB13 VDD FB7 FB2 MFIO 0 VSS VSS B VSS VSS BB1 BB4 BB8 BB12 BBFR SYNC B VDDA1 FB35 FB31 FB26 FB24 FB20 FB16 FB14 F10 FB8 FB5 FB1 VSS VSS A VSS VSS BB0 BB3 BB7 BB11 BB15 SYNC C VSSA1 FB34 FB30 FB27 FB25 FB21 FB17 FB15 FB11 FB9 FB4 FB0 VSS VSS =BasebandInput =MicroprocessorInterface =SignalInterface =Miscellaneous =PowerandBiasing =JTAGInterface P0107-01 GC5328 SLWS218A – OCTOBER 2009 – REVISED OCTOBER 2009 www.ti.com PIN ASSIGNMENT AND DESCRIPTIONS ZER Package (Top View) 10 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): GC5328 |
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