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MSP430AFE232IPWR Datasheet(PDF) 2 Page - Texas Instruments |
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MSP430AFE232IPWR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 47 page MSP430AFE2x3 MSP430AFE2x2 MSP430AFE2x1 SLAS701A – NOVEMBER 2010 – REVISED MARCH 2011 www.ti.com Table 1. Family Members(1) USART Flash SRAM SD24_A 16-Bit Package Device EEM Timer_A(2) (UART/ Clocks I/O (KB) (Byte) Converters MPY Type(3) SPI) HF, DCO, MSP430AFE253IPW 16 512 1 3 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE233IPW 8 512 1 3 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE223IPW 4 256 1 3 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE252IPW 16 512 1 2 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE232IPW 8 512 1 2 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE222IPW 4 256 1 2 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE251IPW 16 512 1 1 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE231IPW 8 512 1 1 1 3 1 11 24-TSSOP VLO HF, DCO, MSP430AFE221IPW 4 256 1 1 1 3 1 11 24-TSSOP VLO (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively. (3) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Development Tool Support All MSP430 ™ microcontrollers include an Embedded Emulation Module (EEM) that allows advanced debugging and programming through easy-to-use development tools. Recommended hardware options include: • Debugging and Programming Interface – MSP-FET430UIF (USB) – MSP-FET430PIF (Parallel Port) • Debugging and Programming Interface with Target Board – MSP-TS430PW24 • Production Programmer – MSP-GANG430 2 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated |
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