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MSP430F5328 Datasheet(PDF) 10 Page - Texas Instruments |
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MSP430F5328 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 102 page MSP430F532x SLAS678C – AUGUST 2010 – REVISED NOVEMBER 2011 www.ti.com Table 2. Terminal Functions (continued) TERMINAL NO. I/O(1) DESCRIPTION NAME PN RGC ZQE General-purpose digital I/O P3.0/UCB0SIMO/ 37 34 H8 I/O Slave in, master out – USCI_B0 SPI mode UCB0SDA I2C data – USCI_B0 I2C mode General-purpose digital I/O P3.1/UCB0SOMI/ 38 35 H9 I/O Slave out, master in – USCI_B0 SPI mode UCB0SCL I2C clock – USCI_B0 I2C mode General-purpose digital I/O P3.2/UCB0CLK/ Clock signal input – USCI_B0 SPI slave mode 39 36 G8 I/O UCA0STE Clock signal output – USCI_B0 SPI master mode Slave transmit enable – USCI_A0 SPI mode General-purpose digital I/O P3.3/UCA0TXD/ 40 37 G9 I/O Transmit data – USCI_A0 UART mode UCA0SIMO Slave in, master out – USCI_A0 SPI mode General-purpose digital I/O P3.4/UCA0RXD/ 41 38 G7 I/O Receive data – USCI_A0 UART mode UCA0SOMI Slave out, master in – USCI_A0 SPI mode General-purpose digital I/O (not available on 'F5328, 'F5326, 'F5324 devices) P3.5/TB0.5 42 N/A N/A I/O TB0 CCR5 capture: CCI5A input, compare: Out5 output General-purpose digital I/O (not available on 'F5328, 'F5326, 'F5324 devices) P3.6/TB0.6 43 N/A N/A I/O TB0 CCR6 capture: CCI6A input, compare: Out6 output General-purpose digital I/O (not available on 'F5328, 'F5326, 'F5324 devices) P3.7/TB0OUTH/ Switch all PWM outputs high-impedance input – TB0 (not available on 'F5328, 44 N/A N/A I/O SVMOUT 'F5326, 'F5324 devices) SVM output (not available on 'F5328, 'F5326, 'F5324 devices) General-purpose digital I/O with reconfigurable port mapping secondary function P4.0/PM_UCB1STE/ 45 41 E8 I/O Default mapping: Slave transmit enable – USCI_B1 SPI mode PM_UCA1CLK Default mapping: Clock signal input – USCI_A1 SPI slave mode Default mapping: Clock signal output – USCI_A1 SPI master mode General-purpose digital I/O with reconfigurable port mapping secondary function P4.1/PM_UCB1SIMO/ 46 42 E7 I/O PM_UCB1SDA Default mapping: Slave in, master out – USCI_B1 SPI mode Default mapping: I2C data – USCI_B1 I2C mode General-purpose digital I/O with reconfigurable port mapping secondary function P4.2/PM_UCB1SOMI/ 47 43 D9 I/O PM_UCB1SCL Default mapping: Slave out, master in – USCI_B1 SPI mode Default mapping: I2C clock – USCI_B1 I2C mode General-purpose digital I/O with reconfigurable port mapping secondary function P4.3/PM_UCB1CLK/ 48 44 D8 I/O Default mapping: Clock signal input – USCI_B1 SPI slave mode PM_UCA1STE Default mapping: Clock signal output – USCI_B1 SPI master mode Default mapping: Slave transmit enable – USCI_A1 SPI mode DVSS2 49 39 F9 Digital ground supply DVCC2 50 40 E9 Digital power supply 10 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated |
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