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TAS5727PHP Datasheet(PDF) 6 Page - Texas Instruments |
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TAS5727PHP Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 61 page  SSTIMER NC PLL_FLTP VR_ANA PBTL AVSS PLL_FLTM BST_A NC PVDD_AB OUT_A RESET PVDD_AB STEST DVDD DVSS GND VREG PVDD_CD BST_D OUT_D AGND PVDD_CD GVDD_OUT P0075-12 PHP Package (Top View) TAS5727 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 TAS5727 SLOS670 – NOVEMBER 2010 www.ti.com DEVICE INFORMATION PIN ASSIGNMENT PIN FUNCTIONS PIN 5-V TYPE(1) TERMINATION(2) DESCRIPTION TOLERANT NAME NO. AGND 30 P Local analog ground for power stage A_SEL_FAULT 14 DIO This pin is monitored on the rising edge of RESET. A value of 0 (15-k Ω pulldown) sets the I2C device address to 0x54 and a value of 1 (15-k Ω pullup) sets it to 0x56. this dual-function pin can be programmed to output internal power-stage errors. AVDD 13 P 3.3-V analog power supply AVSS 9 P Analog 3.3-V supply ground BST_A 4 P High-side bootstrap supply for half-bridge A BST_B 43 P High-side bootstrap supply for half-bridge B BST_C 42 P High-side bootstrap supply for half-bridge C BST_D 33 P High-side bootstrap supply for half-bridge D DVDD 27 P 3.3-V digital power supply DVSS 28 P Digital ground (1) TYPE: A = analog; D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output (2) All pullups are weak pullups and all pulldowns are weak pulldowns. The pullups and pulldowns are included to assure proper input logic levels if the pins are left unconnected (pullups → logic 1 input; pulldowns → logic 0 input). 6 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TAS5727 |
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