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OPA564AQDWPRQ1 Datasheet(PDF) 6 Page - Texas Instruments |
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OPA564AQDWPRQ1 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 34 page 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 V- V+PWR V+PWR V+PWR V OUT V OUT V PWR - V PWR - T SENSE V- V- V+ T FLAG E/S +IN -IN V DIG I FLAG I SET V- PowerPAD HeatSink (Locatedon topside) (2) (2)PowerPADisinternallyconnectedtoV . - 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 V- V+ T FLAG E/S +IN -IN V DIG I FLAG I SET V- V- V+PWR V+PWR V+PWR V OUT V OUT V PWR - V PWR - T SENSE V- PowerPAD HeatSink (Locatedon bottomside) (1) (1)PowerPADisinternallyconnectedtoV , Soldering the PowerPAD to the PCB is always required, even with applications that havelowpowerdissipation. - OPA564-Q1 SBOS567 – JUNE 2011 www.ti.com PIN CONFIGURATIONS DWP PACKAGE DWD PACKAGE PowerPAD on Bottom PowerPAD on Top PIN DESCRIPTIONS DWP DWD (PAD DOWN) (PAD UP) PIN NO. PIN NO. NAME DESCRIPTION 1, 10, 11, 20 1, 10, 11, 20 V – –Supply for Amplifier, PWR Out, and Metal PowerPAD 2 19 V+ +Supply for Signal Amplifier Thermal Over Temperature Flag; flag is high when alarmed and device has 3 18 TFLAG gone into thermal shutdown. 4 17 E/S Enable/Shutdown Output Stage; take E/S low to shut down output 5 16 +IN Noninverting Op Amp Input 6 15 –IN Inverting Op Amp Input +Supply for Digital Flag and E/S (referenced to V –). 7 14 VDIG Valid Range is (V –) + 3.0V ≤ VDIG ≤ (V–) + 5.5V. 8 13 IFLAG Current Limit Flag; Active High 9 12 ISET Current Limit Set (see Applications Section) 12 9 TSENSE Temperature Sense Pin for use with TMP411 13, 14 7, 8 V – PWR –Supply for Power Output Stage 15, 16 5, 6 VOUT Output Voltage; RO is high impedance when shut down 17, 18, 19 3, 4, 2 V+ PWR +Supply for Power Output Stage 6 Copyright © 2011, Texas Instruments Incorporated |
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