1

2

3

4

5

10

9

8

7

6

V

REF

V

OUT

V

FB

V

SJ

V

IN2

D

/V

OUT

CLAMP

1W

GND

V

S

V

IN1

PGA308

1

2

3

4

5

10

9

8

7

6

V

REF

V

OUT

V

FB

V

SJ

V

IN2

D

/V

OUT

CLAMP

1W

GND

V

S

V

IN1

PGA308

PGA308-Q1

www.ti.com

SBOS599A – MARCH 2012 – REVISED MARCH 2012

PIN CONFIGURATIONS

DGS PACKAGE

DRK PACKAGE

MSOP-10

3x4 DFN-10

(TOP VIEW)

(TOP VIEW)

PIN DESCRIPTIONS

PIN #

NAME

DESCRIPTION

1

module either through the One-Wire interface (1W pin) or as a permanently configured module through

the power-on reset (POR) OTP memory setting.

One-Wire interface program pin. UART interface for digital calibration of the PGA308-Q1 over a single

2

1W

3

GND

Ground.

4

+Voltage supply.

Signal input voltage 1. Connect to + or – output of the sensor bridge. Internal multiplexer can change

5

connection internally to front-end PGA.

Signal input voltage 2. Connect to + or – output of the sensor bridge. Internal multiplexer can change

6

connection internally to front-end PGA.

Output amplifier summing junction. Use for output amplifier compensation when driving large capacitive

7

loads (> 200pF) and/or for using external gain setting resistors for the output amplifier.

resistors for the output amplifier are used, this pin is also the voltage feedback sense point for the

8

9

Analog output voltage of conditioned sensor.

10

individually selected for over-/under-scale threshold reference and fault monitor comparator reference.

Copyright © 2012, Texas Instruments Incorporated

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9

Product Folder Link(s): PGA308-Q1