SN65LVPE501

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SLLSE30A – MAY 2010 – REVISED MAY 2012

ELECTRICAL CHARACTERISTICS (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

TRANSMITTER AC/DC (under recommended operating conditions, unless otherwise noted)

800

1000

1200

875

mV

1100

Differential peak-to-peak Output

655

Non-Transition Bit

Voltage

495

mV

Non-Transition Bit

350

NC Non-Transition Bit

DEx, OSx = NC, See

Operating temperature 0°C to 85°C

–3.0

–3.7

–4.0

Figure 11 ;

dB

(for OS1,2 = 1 and 0 see

Operating temperature –40°C to 85°C

–3.0

–3.7

–4.2

Table 2)

De-Emphasis Level

DEx = 0, OSx = NC

–6.4

dB

DEx = 1, OSx = NC

–9.4

De-Emphasis Width

At 5Gbps

0.8

UI

DC Differential Impedance

Defined during signaling

80

100

120

Ω

Operating temperature 0°C to 85°C

10

f = 50 MHz – 1.25 GHz.

Operating temperature –40°C to 85°C

9.5

Differential Return Loss

dB

Operating temperature 0°C to 85°C

6

f = 1.25 GHz – 2.5 GHz,

Operating temperature –40°C to 85°C

5.5

Common Mode Return Loss

f = 50 MHz – 2.5 GHz

10

dB

TX short circuit current

TX± shorted to GND

60

90

mA

Transmitter DC common-mode

Allowed DC CM voltage at TX pins

2.1

2.65

3.1

V

voltage

TX AC common mode voltage at

26

100

mVpp

GEN II speed

TX AC common mode voltage at

2

20

mV

GEN I speed

Absolute Delta DC CM voltage

0

100

mV

during active and idle states

Absolute Delta of DC CM voltage

0

25

mV

Delta

between D+ and D–

Electrical idle differential peak

0

1

10

mVpp

output voltage

DC Electrical idle differential

3.5

mV

output voltage

Voltage change to allow receiver

Positive voltage to sense receiver

600

mV

detect

DEx = NC, OS = NC (CH 0 and CH 1) 20%-80% of differential voltage

Output Rise/Fall time

30

53

ps

at the output; VID > 1000mVpp

DEx = NC, OS = NC (CH 0 and CH 1) 20%-80% of differential voltage

Output Rise/Fall time mismatch

1

20

ps

at the output

DEx = NC (CH 0 and CH 1). Propagation delay between 50% level at

Differential Propagation Delay

280

330

ps

input and output. See Figure 6

Idle entry and exit times

See Figure 7

4

6

ns

Tx EQUALIZATION at GEN II Speed (under recommenced operating conditions)

At point A in Figure 10(2)

30

50

(1)

Total Jitter

ps pp

At point B in Figure 10(2)

25

80

At point A in Figure 10(2)

16

30

Deterministic Jitter

ps pp

At point B in Figure 10 (2)

11

60

(1)

(2)

Refer to Figure 10 with ± K28.5 pattern at 5Gbps, –3.5dB DE from source AWG .

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