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SM320C6201-EP Datasheet(PDF) 8 Page - Texas Instruments |
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SM320C6201-EP Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 59 page  SM320C6201-EP FIXED-POINT DIGITAL SIGNAL PROCESSOR SGUS041A -- MAY 2003 -- REVISED JANUARY 2004 8 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251--1443 signal groups description (continued) CE3 ARE ED[31:0] CE2 CE1 CE0 EA[21:2] BE3 BE2 BE1 BE0 HOLD HOLDA TOUT1 CLKX1 FSX1 DX1 CLKR1 FSR1 DR1 CLKS1 AOE AWE ARDY SSADS SSOE SSWE SSCLK SDA10 SDRAS SDCAS SDWE SDCLK TOUT0 CLKX0 FSX0 DX0 CLKR0 FSR0 DR0 CLKS0 Data Memory Map Space Select Word Address Byte Enables HOLD/ HOLDA 32 20 Asynchronous Memory Control SBSRAM Control SDRAM Control EMIF (External Memory Interface) Timer 1 Receive Receive Timer 0 Timers McBSP1 McBSP0 Transmit Transmit Clock Clock McBSPs (Multichannel Buffered Serial Ports) TINP1 TINP0 Figure 3. Peripheral Signals |
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