TPS7A6301-Q1, TPS7A6333-Q1

TPS7A6350-Q1, TPS7A6401-Q1

SLVSAB1D – JUNE 2011 – REVISED JULY 2012

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ABSOLUTE MAXIMUM RATINGS

(1)

over operating free-air temperature range (unless otherwise noted)

DESCRIPTION

VALUE

UNIT

45

V

Regulated output

7

V

FB

7

V

ROSC

7

V

nWD_EN, WD,

WD_FLAG,

7

V

WD_FLT

nRST

7

V

RDELAY

7

V

Thermal impedance junction to exposed pad TSSOP-PWP package

4.1

°C/W

Thermal impedance junction to exposed pad VSON-DRK package

5.2

°C/W

51

°C/W

51.7

°C/W

ESD

2

kV

Operating ambient temperature

125

°C

Storage temperature range

–65 to 150

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage

values are with respect to GND.

(2)

Absolute negative voltage on these pins not to go below –0.3 V.

(3)

Absolute maximum voltage for duration less than 480 ms.

(4)

The thermal data is based on JEDEC standard high-K profile – JESD 51-5. The copper pad is soldered to the thermal land pattern. Also,

the correct attachment procedure must be incorporated.

(5)

The human body model is a 100-pF capacitor discharged through a 1.5-k

Ω resistor into each pin.

2

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