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TPS65251 Datasheet(PDF) 6 Page - Texas Instruments |
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TPS65251 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 31 page TPS65251 SLVSAA4B – JUNE 2010 – REVISED JANUARY 2011 www.ti.com PACKAGE DISSIPATION RATINGS (1) TA = 25°C TA = 55°C TA = 85°C PACKAGE qJA (°C/W) POWER RATING (W) POWER RATING (W) POWER RATING (W) RHA 30 3.33 2.3 1.3 (1) Based on JEDEC 51.5 HIGH K environment measured on a 76.2 x 114 x .6-mm board with the following layer arrangement: (a) Top layer: 2 Oz Cu, 6.7% coverage (b) Layer 2: 1 Oz Cu, 90% coverage (c) Layer 3: 1 Oz Cu, 90% coverage (d) Bottom layer: 2 Oz Cu, 20% coverage ELECTRICAL CHARACTERISTICS TJ = -40°C to 125°C, VIN = 12 V, fSW = 1 MHz (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT SUPPLY UVLO AND INTERNAL SUPPLY VOLTAGE VIN Input Voltage range 4.5 18 V IDDSDN Shutdown EN pin = low for all converters 1.3 mA Converters enabled, no load IDDQ Quiescent, low power disabled (Lo) Buck 1 = 3.3 V, Buck 2 = 2.5 V, 20 mA Buck 3 = 7.5 V Converters enabled, no load IDDQ_LOW_P Quiescent, low power enabled (Hi) Buck 1 = 3.3 V, Buck 2 = 2.5 V, 1.5 mA Buck 3 = 7.5 V Rising VIN 4.22 UVLOVIN VIN under voltage lockout V Falling VIN 4.1 UVLODEGLITCH Both edges 110 µs V3V Internal biasing supply 3.3 V V7V Internal biasing supply 6.25 V Rising V7V 3.8 V7VUVLO UVLO for internal V7V rail V Falling V7V 3.6 V7VUVLO_DEGLITCH Falling edge 110 µs BUCK CONVERTERS (ENABLE CIRCUIT, CURRENT LIMIT, SOFT START, SWITCHING FREQUENCY AND SYNC CIRCUIT, LOW POWER MODE) VIH Enable threshold high V3p3 = 3.2 V - 3.4 V 1.55 V VIL Enable treshold Low V3p3 = 3.2 V - 3.4 V 1.24 V ICHEN Pull up current enable pin 1.1 µA tD Discharge time enable pins Power-up 10 ms ISS Soft start pin current source 5 µA FSW_BK Converter switching frequency range Set externally with resistor 0.3 2.2 MHz RFSW Frequency setting resistor Depending on set frequency 50 600 k Ω fSW_TOL Internal oscillator accuracy fSW = 800 kHz -10 10 % VSYNCH External clock threshold high V3p3 = 3.3 V 1.55 V VSYNCL External clock treshold Low V3p3 = 3.3 V 1.24 V SYNCRANGE Synchronization range 0.2 2.2 MHz SYNCCLK_MIN Sync signal minimum duty cycle 40 % SYNCCLK_MAX Sync signal maximum duty cycle 60 % VIHLOW_P Low power mode threshold high V3p3 = 3.3 V 1.55 V VILLOW_P Low power mode treshold Low V3p3 = 3.3 V 1.24 V FEEDBACK, REGULATION, OUTPUT STAGE VIN = 12V TJ = 25°C -1% 0.8 1% VFB Feedback voltage V VIN = 4.5 to 18V -2% 0.8 2% Minimum on time tON_MIN 80 120 ns (current sense blanking) 6 Submit Documentation Feedback Copyright © 2010–2011, Texas Instruments Incorporated Product Folder Link(s): TPS65251 |
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