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SN74LV8154-EP Datasheet(PDF) 2 Page - Texas Instruments |
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SN74LV8154-EP Datasheet(HTML) 2 Page - Texas Instruments |
2 / 15 page SN74LV8154EP DUAL 16 BIT BINARY COUNTER WITH 3STATE OUTPUT REGISTERS SCLS704A − JULY 2006 − REVISED SEPTEMBER 2007 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FUNCTION TABLE (each buffer) INPUTS OUTPUT GAL GAU GBL GBU OUTPUT Yn L H H H Lower byte in A register H L H H Upper byte in A register H H L H Lower byte in B register H H H L Upper byte in B register H H H H Z Combinations of GAL, GAU, GBL, and GBU, other than those shown above, are prohibited. If more than one input is L at the same time, the output data (Y0−Y7) may be invalid. timing diagram 0000 0001 0002 0003 0004 0100 0101 0102 0103 FFFD FFFE FFFF 0000 0001 0000 0001 0002 0003 0004 0100 0101 0102 FFFD FFFE FFFF 0000 0001 Don’t Care 00 01 02 03 00 FF 01 CCKBEN CCLR CCKA CCKB RCLK A Counter B Counter GAL GAU GBL GBU Output RCOA |
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