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TLV705185YFPR Datasheet(PDF) 11 Page - Texas Instruments |
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TLV705185YFPR Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 26 page  TLV705 TLV705P www.ti.com SBVS151B – DECEMBER 2010 – REVISED DECEMBER 2011 APPLICATION INFORMATION The TLV705 and TLV705P series of devices belong BOARD LAYOUT RECOMMENDATIONS TO to a new family of next-generation value low-dropout IMPROVE PSRR AND NOISE PERFORMANCE (LDO) voltage regulators. They consume low Input and output capacitors should be placed as quiescent current and deliver excellent line and load close to the device pins as possible. To improve ac transient performance. This performance, combined performance (such as PSRR, output noise, and with low noise, very good PSRR with little (VIN – transient response), it is recommended that the board VOUT) headroom, makes these devices ideal for RF be designed with separate ground planes for VIN and portable applications. This family of regulators offers VOUT, with the ground plane connected only at the sub-bandgap output voltages down to 0.7 V, current GND pin of the device. In addition, the ground limit, and thermal protection, and are specified connection for the output capacitor should be from –40°C to +125°C. The TLV705P provides an connected directly to the GND pin of the device. High active pull-down circuit to quickly discharge the ESR capacitors may degrade PSRR. outputs. INTERNAL CURRENT LIMIT INPUT AND OUTPUT CAPACITOR REQUIREMENTS The internal current limits of the TLV705 series help protect the regulator during fault conditions. During 1- μF X5R- and X7R-type ceramic capacitors are current limit, the output sources a fixed amount of recommended because these components have current that is largely independent of output voltage. minimal variation in value and equivalent series In such a case, the output voltage is not regulated, resistance (ESR) over temperature. However, the and can be measured as VOUT = ILIMIT × RLOAD. The TLV705 series is designed to be stable with an PMOS pass transistor dissipates [(VIN – VOUT) × ILIMIT] effective capacitance of 0.1 μF or larger at the output. until a thermal shutdown is triggered and the device Thus, the device would also be stable with capacitors turns off. As the device cools down, it is turned on by of other dielectrics as long as the effective the internal thermal shutdown circuit. If the fault capacitance under the operating bias voltage and condition continues, the device cycles between temperature is greater than 0.1 μF. This effective current limit and thermal shutdown; see the Thermal capacitance refers to the capacitance that the LDO Information section for more details. sees under operating bias voltage and temperature conditions (that is, the capacitance after taking the The PMOS pass element in the TLV705 has a built-in bias voltage and temperature derating into body diode that conducts current when the voltage at consideration). In addition to allowing the use of lower VOUT exceeds the voltage at VIN. This current is not cost dielectrics, it also enables using smaller footprint limited, so if extended reverse voltage operation is capacitors that have higher derating in anticipated, external limiting to 5% of rated output space-constrained applications. current is recommended. Note that using a 0.1- μF rating capacitor at the output SOFT-START of the LDO does not ensure stability because the effective capacitance under operating conditions The startup current is given by Equation 1. This would be less than 0.1 μF. Maximum ESR should be equation shows that soft-start current is directly less than 200 m Ω. proportional to COUT. ISOFT-START = COUT (μF) × 0.06 (V/μs) + ILOAD (mA) (1) Although an input capacitor is not required for stability, it is good analog design practice to connect The output voltage ramp rate is independent of COUT a 0.1- μF to 1-μF low ESR capacitor across the VIN and the load current, and has a typical value of and GND pins of the regulator. This capacitor 0.06 V/ μs. counteracts reactive input sources and improves The TLV705 automatically adjusts the soft-start transient response, noise rejection, and ripple current to supply both the load current and the rejection. A higher-value capacitor may be necessary current to charge COUT. For example, if ILOAD = 0 mA if large, fast rise-time load transients are anticipated, upon enabling the LDO, then ISOFT-START = 1 μF × or if the device is not located close to the power 0.06 V/ μs + 0 mA = 60 mA, which is the current that source. If source impedance is more than 2 Ω, a charges the output capacitor. However if ILOAD = 0.1- μF input capacitor may be necessary to ensure 200 mA, then ISOFT-START = 1 μF × 0.06 V/μs + 200 stability. mA = 260 mA, which is the current required for charging the output capacitor and supplying the load current. Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 11 |
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