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TMS320TEST1000 Datasheet(PDF) 3 Page - Texas Instruments |
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TMS320TEST1000 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 8 page DVCPro50 Decoder (v01.01.00) on TMS320C6678 SPRS807 – NOVEMBER 2011 3 Table 3. Memory Statistics (TMS320C6678 External Memory) CONFIGURATION ID MEMORY STATISTICS(1)(2) PROGRAM MEMORY DATA MEMORY(4) (5) TOTAL PERSISTENT CONSTANT STACK DV50_DEC_001 23.4 0.75 26.1 3 53.25 Note: 1. All these memory requirements are for DVCPro50 decoder library only. They do not include any memory requirements from test application side. Stack, heap and code requirements for test-application are extra. 2. All memory requirements are expressed in kilobytes (1K bytes = 1024 bytes). 3. The memory requirements given in Table 3 are calculated for D1 PAL resolution. 4. Typical input and output buffers for D1 PAL resolutions are as follows. Input Buffer: 282KB Output Buffer:810KB 5. One output buffer is sufficient as a part of DPB i.e only Intra frames are allowed in the standard. Table 4. Internal Data Memory Split-up CONFIGURATION ID DATA MEMORY – INTERNAL(1) (3) LOCAL L2(2) SHARED L2 TOTAL CONSTANTS PERSISTENT SCRATCH DV50_DEC_001 0 0 61 0 61 Note: 1. Decoder stack is mapped to Local L2 memory and not included in the above table. 2. Constant and Persistent memory can be corrupted by application provided application uses algorithm activate and deactivate APIs before using process and control APIs 3. All memory requirements are expressed in kilobytes (1K bytes = 1024 bytes). Table 5. Cache/SRAM configuration NAME AVAILABLE CACHE SRAM L1p (Program Memory) 32K 32K 0K L1d( Data Memory) 32K 32K 0K L2 512K 64K 448K |
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