TPS43350-Q1

TPS43351-Q1

SLVSAR7B – JUNE 2011 – REVISED MAY 2012

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PIN FUNCTIONS (continued)

NAME

NO.

I/O

DESCRIPTION

External high-side N-channel MOSFET for buck regulator BuckA can be driven from this output. The output

GA1

6

O

provides high peak currents to drive capacitive loads. The gate drive is referred to a floating ground reference

provided by PHA and has a voltage swing provided by CBA.

External low-side N-channel MOSFET for buck regulator BuckA can be driven from this output. The output

GA2

8

O

provides high peak currents to drive capacitive loads. The voltage swing on this pin is provided by VREG.

External high-side N-channel MOSFET for buck regulator BuckB can be driven from this output. The output

GB1

33

O

provides high peak currents to drive capacitive loads. The gate drive is referred to a floating ground reference

provided by PHB and has a voltage swing provided by CBB.

External low-side N-channel MOSFETs forbuck regulator BuckB can be driven from this output. The output

GB2

31

O

provides high peak currents to drive capacitive loads. The voltage swing on this pin is provided by VREG.

A floating output drive to control the external P-channel MOSFET is available at this pin. This MOSFET can be

GC2

4

O

used to bypass a reverse-protection diode, and thus reduce power losses.

2, 3,

NC

18,

–

36

PGNDA

9

O

Power ground connection to the source of the low-side N-channel MOSFETs of BuckA.

PGNDB

30

O

Power ground connection to the source of the low-side N-channel MOSFETs of BuckB

Open-drain power-good indicator pin for BuckA. An internal power-good comparator monitors the voltage at the

PGA

15

O

feedback pin and pulls this output low when the output voltage falls below 93% of the set value.

Open-drain power-good indicator pin for BuckB. An internal power-good comparator monitors the voltage at the

PGB

24

O

feedback pin and pulls this output low when the output voltage falls below 93% of the set value.

Switching terminal of buck regulator BuckA, providing a floating ground reference for the high-side MOSFET gate-

PHA

7

O

driver circuitry and used to sense current reversal in the inductor when discontinuous-mode operation is desired.

Switching terminal of buck regulator BuckB, providing a floating ground reference for the high-side MOSFET gate-

PHB

32

O

driver circuitry and used to sense current reversal in the inductor when discontinuous-mode operation is desired.

The operating switching frequency of the buck controllers is set by connecting a resistor to ground on this pin. A

RT

22

O

short circuit to ground on this pin defaults operation to 400 kHz for the buck controllers.

SA1

10

I

High-impedance differential-voltage inputs from the current-sense element (sense resistor or inductor DCR) for

each buck controller. The current-sense element should be chosen to set the maximum current through the

inductor based on the current-limit threshold (subject to tolerances) and considering the typical characteristics

SA2

11

I

across duty cycle and VIN. (SA1 positive node, SA2 negative node)

SB1

29

I

High-Impedance differential-voltage inputs from the current-sense element (sense resistor or inductor DCR) for

each buck controller. The current-sense element should be chosen to set the maximum current through the

inductor based on the current-limit threshold (subject to tolerances) and considering the typical characteristics

SB2

28

I

across duty cycle and VIN. (SB1 positive node, SB2 negative node)

Soft-start or tracking input for buck controller BuckA. The buck controller regulates the FBA voltage to the lower of

0.8 V or the SSA pin voltage. An internal pullup current source of 1 µA is present at the pin, and an appropriate

SSA

14

O

capacitor connected here can be used to set the soft-start ramp interval. A resistor divider connected to another

supply can also be used to provide a tracking input to this pin.

Soft-start or tracking input for buck controller BuckB. The buck controller regulates the FBB voltage to the lower of

0.8 V or the SSB pin voltage. An internal pullup current source of 1 µA is present at the pin, and an appropriate

SSB

25

O

capacitor connected here can be used to set the soft-start ramp interval. A resistor divider connected to another

supply can also be used to provide a tracking input to this pin.

If an external clock is present on this pin, the device detects it, and the internal PLL locks on to the external clock.

This overrides the internal oscillator frequency. The device can synchronize to frequencies from 150 kHz to 600

kHz. A high logic level on this pin ensures forced continuous-mode operation of the buck controllers and inhibits

SYNC

20

I

transition to low-power mode. An open or low allows discontinuous-mode operation and entry into low-power

mode at light loads. On the TPS43351, a high level enables frequency-hopping spread spectrum, whereas an

open or a low level disables it.

VBAT

1

I

Supply pin

Main input pin. This is the buck controller input pin. Additionally, it powers the internal control circuits of the

VIN

38

I

device.

An external capacitor on this pin is required to provide a regulated supply for the gate drivers of the buck

controllers. A capacitance in the order of 4.7 µF is recommended. The regulator can be used such that it is either

VREG

35

O

powered from VIN or EXTSUP. This pin has current-limit protection and should not be used to drive any other

loads.

8

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