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AFCT-721XPDZ Datasheet(PDF) 4 Page - AVAGO TECHNOLOGIES LIMITED |
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AFCT-721XPDZ Datasheet(HTML) 4 Page - AVAGO TECHNOLOGIES LIMITED |
4 / 14 page Table 1. Electrical Pin Definitions Pin Name Logic Function/Description Notes 1 GND ModuleGround 1 2 VEE5 -5.2Vpowersupply.(NotUsed) 3 Mod-Desel LVTTL-I ModuleDe-select;Whenheldlowallowsthemoduletorespondto2-wireSe- rialinterfacecommands 4 4 Interrupt LVTTL-O Interrupt;Indicatespresenceofanimportantconditionwhichcanbereadover theserial2-wireinterface 2 5 TX_DIS LVTTL-I TransmitterDisable;TransmitterLaserSourceTurnedOff 4 6 VCC5 5Vpowersupply.(NotUsed) 7 GND ModuleGround 1 8 VCC3 +3.3VPowerSupply 9 VCC3 +3.3VPowerSupply 10 SCL LVTTL-I TwoWireInterfaceClock 2 11 SDA LVTTL-I/O TwoWireInterfaceDataLine 2 12 Mod_Abs LVTTL-O LVTTL-OMod_AbsIndicatesModuleisnotpresent.GroundedintheModule 2 13 Mod_NR LVTTL-O ModuleNotReady;IndicatingModuleOperationalFault 2 14 RX_LOS LVTTL-O ReceiverLossOfSignalIndicator 2 15 GND ModuleGround 1 16 GND ModuleGround 1 17 RD- CML-O ReceiverInvertedDataOutput 18 RD+ CML-O ReceiverNon-InvertedDataOutput 19 GND ModuleGround 1 20 VCC2 +1.8VPowerSupply.(NotUsed) 21 P_Down/RST LVTTL-I Powerdown:Whenhigh,themoduleisputintoalowerpowermode.Serial interfaceisfunctionalinthelowpowermode.Reset:Thefallingedgeinitiates acompleteresetofthemoduleincludingtheserialInterface,equivalenttoa powercycle. 4 22 VCC2 +1.8VPowerSupply.(NotUsed) 23 GND ModuleGround 1 24 RefCLK+ PECL-I ReferenceClockNon-InvertedInput,ACcoupledonthehostboard(NotUsed) 3 25 RefCLK- PECL-I ReferenceClockInvertedInput,ACcoupledonthehostboard(NotUsed) 3 26 GND ModuleGround 1 27 GND ModuleGround 1 28 TD- CML-I TransmitterInvertedDataInput 29 TD+ CML-I TransmitterNon-InvertedDataInput 30 GND ModuleGround 1 Notes: 1. ModulegroundpinsGndareisolatedfromthemodulecaseandchassisgroundwithinthemodule. 2. OpenCollectorshouldbepulledupwith4.7KWto10KWtoavoltagebetween3.15Vand3.6Vonthehostboard. 3. RefCLK+/-areinternallyterminated(50W) 4. PulleduptoVcc3via4.7-10KWresistorinsidethemodule |
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