TPS62242-Q1 datasheet(4/21 Pages) TI1

Part #	TPS62242-Q1

Description	2.25-MHz 300-mA Step-Down Converter in DDC/TSOT23 Package

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TPS62242-Q1

SLVSB38A – MARCH 2011 – REVISED MARCH 2012

www.ti.com

ELECTRICAL CHARACTERISTICS

Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply

for condition VIN = EN = 3.6V. External components CIN = 4,7μF 0603, COUT = 10μF 0603, L = 2.2μH, refer to parameter

measurement information.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY

VIN

Input voltage range

2

6

V

2.3 V

≤ VIN ≤ 6 V

300

IOUT

Output current

mA

2 V

≤ VIN ≤ 2.3 V

150

IOUT = 0 mA. PFM mode enabled, device not

15

switching

μA

IOUT = 0 mA. PFM mode enabled, device switching,

IQ

Operating quiescent current

18.5

VOUT = 1.8 V,

(1)

IOUT = 0 mA, switching with no load , PWM

3.8

mA

operation , VOUT = 1.8 V, VIN = 3 V

EN = GND

0.1

1

μA

ISD

Shutdown current

TA = 115°C

5

µA

Falling

1.85

UVLO

Undervoltage lockout threshold

V

Rising

1.95

ENABLE, MODE

VIH

High level input voltage, EN

2 V

≤ VIN ≤ 6 V

1

VIN

V

2 V

≤ VIN ≤ 6 V

0

0.4

V

VIL

Low level input voltage, EN

TA = 115°C

0.35

V

IIN

Input bias current, EN

EN

0.01

1

μA

POWER SWITCH

High side MOSFET on-resistance

240

480

RDS(on)

VIN = VGS = 3.6 V, TA = 25°C

m

Ω

Low side MOSFET on-resistance

180

380

VIN = VGS = 3.6 V, TA= 25°C

0.56

0.7

0.84

Forward current limit MOSFET high-

ILIMF

A

side and low side

TA = –40°C to 115°C

0.54

0.95

TSD

Thermal shutdown

Increasing junction temperature

135

150

165

°C

Thermal shutdown hysteresis

Decreasing junction temperature

12

14

16

°C

OSCILLATOR

fSW

Oscillator frequency

2 V

≤ VIN ≤ 6 V

2

2.25

2.5

MHz

OUTPUT

VOUT

Output voltage

1.2

V

Vref

Reference voltage

TA = 25°C

0.594

600

0.606

mV

PWM operation, 2 V

≤ VIN ≤ 6 V, in fixed output

–1.5%

0%

1.5%

voltage versions VFB = VOUT, See

(2)

Feedback voltage

TA = 115°C

–1.5%

2.5%

VFB

Feedback voltage PFM mode

Device in PFM mode

0%

Load regulation

-0.5

%/A

tStart Up

Start-up Time

Time from active EN to reach 95% of VOUT nominal

500

μs

tRamp

VOUT ramp UP time

Time to ramp from 5% to 95% of VOUT

250

μs

VIN = 3.6 V, VIN = VOUT = VSW, EN = GND,

(3)

0.1

1

Ilkg

Leakage current into SW pin

μA

TA = 115°C

10

(1)

See the parameter measurement information.

(2)

for VIN = VO + 0.6

(3)

In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.

4

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