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BR24A01A-WM Datasheet(PDF) 2 Page - Rohm |
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BR24A01A-WM Datasheet(HTML) 2 Page - Rohm |
2 / 18 page BR24A□□-WM series Technical Note 2/17 www.rohm.com 2009.08 - Rev.C © 2009 ROHM Co., Ltd. All rights reserved. ● Absolute maximum ratings (Ta=25℃) Parameter symbol Limits Unit Impressed voltage VCC -0.3~+6.5 V Permissible dissipation Pd 450 (SOP8) *1 mW 450 (SOP-J8) *2 310 (MSOP8) *3 Storage temperature range Tstg -65~+125 ℃ Action temperature range Topr -40~+105 ℃ Terminal voltage - -0.3~VCC+1.0 V When using at Ta=25℃ or higher, 4.5mW(*1,*2) , 3.1mW(*3) to be reduced per 1℃ ● Memory cell characteristics (VCC=2.5~5.5V) Parameter Limits Unit Test Condition Min. Typ. Max. Number of data rewrite times *1 100,000 - - Times Ta=-40~105℃ Data hold years *1 40 - - Years Ta=25℃ ○ Shipment data all address FFh *1 Not 100% TESTED ● Recommended operating conditions Parameter Symbol Limits Unit Power source voltage VCC 2.5~5.5 V Input voltage VIN 0~VCC ● Electrical characteristics (Unless otherwise specified, Ta=-40~+105℃, VCC=2.5~5.5V) Parameter Symbol Limits Unit Conditions Min. Typ. Max. “HIGH” input voltage VIH 0.7VCC - - V “LOW” input voltage VIL - - 0.3 VCC V “LOW” output voltage 1 VOL - - 0.4 V IOL=3.0mA (SDA) Input leak current ILI -1 - 1 μA VIN=0V~VCC Output leak current ILO -1 - 1 μA VOUT=0V~VCC, (SDA) Current consumption at action ICC1 - - 2.0 *1 mA VCC=5.5V,fSCL=400kHz, tWR=5ms, Byte write, Page write 3.0 *2 ICC2 - - 0.5 mA VCC=5.5V,fSCL=400kHz Random read, current read, sequential read Standby current ISB - - 2.0 μA VCC=5.5V, SDA・SCL=VCC A0, A1, A2=GND, WP=GND ◎ Radiation resistance design is not made. *1 BR24A01A/02/04/08/16-WM, *2 BR24A32/64-WM ● Action timing characteristics (Unless otherwise specified, Ta=-40~+105℃, VCC=2.5~5.5V) Parameter Symbol FAST-MODE 2.5V≦VCC≦5.5V STANDARD-MODE 2.5V≦VCC≦5.5V Unit Min. Typ. Max. Min. Typ. Max. SCL frequency fSCL - - 400 - - 100 kHz Data clock “HIGH“ time tHIGH 0.6 - - 4.0 - - μs Data clock “LOW“ time tLOW 1.2 - - 4.7 - - μs SDA, SCL rise time *1 tR - - 0.3 - - 1.0 μs SDA, SCL fall time *1 tF - - 0.3 - - 0.3 μs Start condition hold time tHD:STA 0.6 - - 4.0 - - μs Start condition setup time tSU:STA 0.6 - - 4.7 - - μs Input data hold time tHD:DAT 0 - - 0 - - ns Input data setup time tSU:DAT 100 - - 250 - - ns Output data delay time tPD 0.1 - 0.9 0.2 - 3.5 μs Output data hold time tDH 0.1 - - 0.2 - - μs Stop condition setup time tSU:STO 0.6 - - 4.7 - - μs Bus release time before transfer start tBUF 1.2 - - 4.7 - - μs Internal write cycle time tWR - - 5 - - 5 ms Noise removal valid period (SDA, SCL terminal) tI - - 0.1 - - 0.1 μs WP hold time tHD:WP 0 - - 0 - - ns WP setup time tSU:WP 0.1 - - 0.1 - - μs WP valid time tHIGH:WP 1.0 - - 1.0 - - μs *1 Not 100% tested |
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