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UCC28070QPWRQ1 Datasheet(PDF) 5 Page - Texas Instruments |
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UCC28070QPWRQ1 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 43 page  UCC28070-Q1 www.ti.com SLUSA71A – JULY 2010 – REVISED JUNE 2011 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range −40°C < TA < 125°C, VCC = 12 V, GND = 0 V, RRT = 75 kΩ, RDMX = 68.1 kΩ, RRDM = RSYN = 100 kΩ, CCDR = 2.2 nF, CSS = CVREF = 0.1 µF, CVCC = 1 µF, IVREF = 0 mA (unless otherwise noted) SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Over Voltage VOVP OVP threshold Measured as VSENSE (rising) / VSENSE (regulation) 104 106 108 % OVP hysteresis Measured at VSENSE (falling) 100 mV OVP propagation delay Measured between VSENSE (rising) and GDx (falling) 0.2 0.3 μs Zero-Power VZPWR Zero-power detect threshold Measured at VAO (falling) 0.65 0.75 V Zero-power hysteresis 0.15 Multiplier VAO ≥ 1.5 V, TA = 25°C 15.4 17 20 VAO = 1.2 V, TA = 25°C 13.5 17.0 20.5 kMULT Gain constant VAO ≥ 1.5 V 14 17 22 μA VAO = 1.2 V 12 17 22.5 VINAC = 0.9 VPK, VAO = 0.8 V -0.2 0 0.2 IIMO Output current: zero VINAC = 0 V, VAO = 5 V -0.2 0 0.2 Quantized Voltage Feed Forward VLVL1 Level 1 threshold (3) 0.6 0.7 0.8 VLVL2 Level 2 threshold 1 VLVL3 Level 3 threshold 1.2 VLVL4 Level 4 threshold 1.4 Measured at VINAC (rising) V VLVL5 Level 5 threshold 1.65 VLVL6 Level 6 threshold 1.95 VLVL7 Level 7 threshold 2.25 VLVL8 Level 8 threshold 2.6 Current Amplifiers CAOx high voltage 5.75 6 V CAOx low voltage 0.1 gMC CAOx transconductance 100 μs CAOx sink current, overdriven 50 μA CAOx source current, −50 overdriven Input common mode range 0 3.6 V RSYNTH = 6 V, TA = 25°C -16 -8 0 Input offset Voltage mV RSYNTH = 6 V -50 -8 40 Input offset voltage -50 −8 40 TA = 25°C -12 0 12 mV Measured as Phase A 's input Phase mismatch offset minus Phase B 's input offset T A = -40°C to 125°C -20 14 CAOx pulldown current VSENSE = 0.5 V, CAOx = 0.2 V 0.5 0.9 mA (3) The Level 1 threshold represents the "zero-crossing detection" threshold above which VINAC must rise to initiate a new input half-cycle, and below which VINAC must fall to terminate that half-cycle. Copyright © 2010–2011, Texas Instruments Incorporated 5 |
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